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Béla Fehér: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Lörinc Antoni, Régis Leveugle, Béla Fehér
    Using Run-Time Reconfiguration for Fault Injection in Hardware Prototypes. [Citation Graph (0, 0)][DBLP]
    DFT, 2000, pp:405-413 [Conf]
  2. Lörinc Antoni, Régis Leveugle, Béla Fehér
    Using Run-Time Reconfiguration for Fault Injection in Hardware Prototypes. [Citation Graph (0, 0)][DBLP]
    DFT, 2002, pp:245-253 [Conf]
  3. Péter Szántó, Béla Fehér
    High performance visibility testing with screen segmentation. [Citation Graph (0, 0)][DBLP]
    ESTImedia, 2004, pp:75-80 [Conf]
  4. Béla Fehér, Gábor Szedö
    Cost Effective 2×2 Inner Product Processors. [Citation Graph (0, 0)][DBLP]
    FPL, 1998, pp:348-355 [Conf]
  5. Tamás Szabó, Lörinc Antoni, Gábor Horváth, Béla Fehér
    A Full-Parallel Digital Implementation for Pre-Trained NNs. [Citation Graph (0, 0)][DBLP]
    IJCNN (2), 2000, pp:49-54 [Conf]
  6. Régis Leveugle, Lörinc Antoni, Béla Fehér
    Dependability Analysis: A New Application for Run-Time Reconfiguration. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2003, pp:173- [Conf]
  7. Péter Szántó, Béla Fehér
    3D rendering using FPGAs. [Citation Graph (0, 0)][DBLP]
    VLSI-SOC, 2003, pp:149-154 [Conf]

  8. Neural network implementation using distributed arithmetic. [Citation Graph (, )][DBLP]


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