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Publications of Author

1. Cristian Grecu, Partha Pratim Pande, Baosheng Wang, André Ivanov, Res Saleh
   Methodologies and Algorithms for Testing Switch-Based NoC Interconnects. [Citation Graph (0, 0)][DBLP]
   DFT, 2005, pp:238-246 [Conf]
   
2. Cristian Grecu, André Ivanov, Res Saleh, Partha Pratim Pande
   NoC Interconnect Yield Improvement Using Crosspoint Redundancy. [Citation Graph (0, 0)][DBLP]
   DFT, 2006, pp:457-465 [Conf]
   
3. Partha Pratim Pande, Amlan Ganguly, Brett Feero, Benjamin Belzer, Cristian Grecu
   Design of Low power & Reliable Networks on Chip through joint crosstalk avoidance and forward error correction coding. [Citation Graph (0, 0)][DBLP]
   DFT, 2006, pp:466-476 [Conf]
   
4. Partha Pratim Pande, Haibo Zhu, Amlan Ganguly, Cristian Grecu
   Energy Reduction through Crosstalk Avoidance Coding in NoC Paradigm. [Citation Graph (0, 0)][DBLP]
   DSD, 2006, pp:689-695 [Conf]
   
5. Cristian Grecu, Partha Pratim Pande, André Ivanov, Res Saleh
   Structured interconnect architecture: a solution for the non-scalability of bus-based SoCs. [Citation Graph (0, 0)][DBLP]
   ACM Great Lakes Symposium on VLSI, 2004, pp:192-195 [Conf]
   
6. Cristian Grecu, André Ivanov, Res Saleh, Egor S. Sogomonyan, Partha Pratim Pande
   On-line Fault Detection and Location for NoC Interconnects. [Citation Graph (0, 0)][DBLP]
   IOLTS, 2006, pp:145-150 [Conf]
   
7. Partha Pratim Pande, Cristian Grecu, André Ivanov, Res Saleh
   Design of a switch for network on chip applications. [Citation Graph (0, 0)][DBLP]
   ISCAS (5), 2003, pp:217-220 [Conf]
   
8. Partha Pratim Pande, Cristian Grecu, Michael Jones, André Ivanov, Res Saleh
   Effect of traffic localization on energy dissipation in NoC-based interconnect. [Citation Graph (0, 0)][DBLP]
   ISCAS (2), 2005, pp:1774-1777 [Conf]
   
9. Cristian Grecu, Partha Pratim Pande, André Ivanov, Res Saleh
   A Scalable Communication-Centric SoC Interconnect Architecture. [Citation Graph (0, 0)][DBLP]
   ISQED, 2004, pp:343-348 [Conf]
   
10. Brett Feero, Partha Pratim Pande
    Performance Evaluation for Three-Dimensional Networks-On-Chip. [Citation Graph (0, 0)][DBLP]
    ISVLSI, 2007, pp:305-310 [Conf]
    
11. Amlan Ganguly, Partha Pratim Pande, Benjamin Belzer, Cristian Grecu
    Addressing Signal Integrity in Networks on Chip Interconnects through Crosstalk-Aware Double Error Correction Coding. [Citation Graph (0, 0)][DBLP]
    ISVLSI, 2007, pp:317-324 [Conf]
    
12. Partha Pratim Pande, Cristian Grecu, André Ivanov
    High-Throughput Switch-Based Interconnect for Future SoCs. [Citation Graph (0, 0)][DBLP]
    IWSOC, 2003, pp:304-310 [Conf]
    
13. Cristian Grecu, Partha Pratim Pande, André Ivanov, Res Saleh
    BIST for Network-on-Chip Interconnect Infrastructures. [Citation Graph (0, 0)][DBLP]
    VTS, 2006, pp:30-35 [Conf]
    
14. Partha Pratim Pande, Cristian Grecu, André Ivanov, Resve A. Saleh, Giovanni De Micheli
    Design, Synthesis, and Test of Networks on Chips. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2005, v:22, n:5, pp:404-413 [Journal]
    
15. Partha Pratim Pande, Cristian Grecu, Michael Jones, André Ivanov, Resve A. Saleh
    Performance Evaluation and Design Trade-Offs for Network-on-Chip Interconnect Architectures. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2005, v:54, n:8, pp:1025-1040 [Journal]
    
16. Cristian Grecu, Partha Pratim Pande, André Ivanov, Res Saleh
    Timing analysis of network on chip architectures for MP-SoC platforms. [Citation Graph (0, 0)][DBLP]
    Microelectronics Journal, 2005, v:36, n:9, pp:833-845 [Journal]
    
17. Cristian Grecu, Lorena Anghel, Partha Pratim Pande, André Ivanov, Resve Saleh
    Essential Fault-Tolerance Metrics for NoC Infrastructures. [Citation Graph (0, 0)][DBLP]
    IOLTS, 2007, pp:37-42 [Conf]
    
18. Partha Pratim Pande, Amlan Ganguly, Brett Feero, Cristian Grecu
    Applicability of Energy Efficient Coding Methodology to Address Signal Integrity in 3D NoC Fabrics. [Citation Graph (0, 0)][DBLP]
    IOLTS, 2007, pp:161-166 [Conf]
    
19. Cristian Grecu, André Ivanov, Partha Pratim Pande, Axel Jantsch, Erno Salminen, Ümit Y. Ogras, Radu Marculescu
    Towards Open Network-on-Chip Benchmarks. [Citation Graph (0, 0)][DBLP]
    NOCS, 2007, pp:205- [Conf]
    
20. 
    Performance Evaluation of Adaptive Routing Algorithms for achieving Fault Tolerance in NoC Fabrics. [Citation Graph (, )][DBLP]
    
    
21. 
    Novel interconnect infrastructures for massive multicore chips - an overview. [Citation Graph (, )][DBLP]
    
    
22. 
    Performance evaluation of wireless networks on chip architectures. [Citation Graph (, )][DBLP]