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C. V. Krishna: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. C. V. Krishna, Nur A. Touba
    Hybrid BIST Using an Incrementally Guided LFSR. [Citation Graph (0, 0)][DBLP]
    DFT, 2003, pp:217-224 [Conf]
  2. C. V. Krishna, Nur A. Touba
    Adjustable Width Linear Combinational Scan Vector Decompression. [Citation Graph (0, 0)][DBLP]
    ICCAD, 2003, pp:863-866 [Conf]
  3. Kartik Mohanram, C. V. Krishna, Nur A. Touba
    A methodology for automated insertion of concurrent error detection hardware in synthesizable Verilog RTL. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 2002, pp:577-580 [Conf]
  4. C. V. Krishna, Abhijit Jas, Nur A. Touba
    Test vector encoding using partial LFSR reseeding. [Citation Graph (0, 0)][DBLP]
    ITC, 2001, pp:885-893 [Conf]
  5. C. V. Krishna, Nur A. Touba
    Reducing Test Dat Volume Using LFSR Reseeding with Seed Compression. [Citation Graph (0, 0)][DBLP]
    ITC, 2002, pp:321-330 [Conf]
  6. C. V. Krishna, Nur A. Touba
    3-Stage Variable Length Continuous-Flow Scan Vector Decompression Scheme. [Citation Graph (0, 0)][DBLP]
    VTS, 2004, pp:79-86 [Conf]
  7. Abhijit Jas, C. V. Krishna, Nur A. Touba
    Hybrid BIST Based on Weighted Pseudo-Random Testing: A New Test Resource Partitioning Scheme. [Citation Graph (0, 0)][DBLP]
    VTS, 2001, pp:2-8 [Conf]
  8. C. V. Krishna, Abhijit Jas, Nur A. Touba
    Achieving high encoding efficiency with partial dynamic LFSR reseeding. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Design Autom. Electr. Syst., 2004, v:9, n:4, pp:500-516 [Journal]
  9. Abhijit Jas, C. V. Krishna, Nur A. Touba
    Weighted pseudorandom hybrid BIST. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 2004, v:12, n:12, pp:1277-1283 [Journal]

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