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Markus Seuring: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Markus Seuring, Michael Gössel
    A Structural Approach for Space Compaction for Sequential Circuits. [Citation Graph (0, 0)][DBLP]
    DFT, 1999, pp:227-0 [Conf]
  2. Debaleena Das, Nur A. Touba, Markus Seuring, Michael Gössel
    Low Cost Concurrent Error Detection Based on Modulo Weight-Based Codes. [Citation Graph (0, 0)][DBLP]
    IOLTW, 2000, pp:171-0 [Conf]
  3. Adit D. Singh, Egor S. Sogomonyan, Michael Gössel, Markus Seuring
    Testability evaluation of sequential designs incorporating the multi-mode scannable memory element. [Citation Graph (0, 0)][DBLP]
    ITC, 1999, pp:286-293 [Conf]
  4. Markus Seuring, Michael Gössel, Egor S. Sogomonyan
    A Structural Approach for Space Compaction for Concurrent Checking and BIST. [Citation Graph (0, 0)][DBLP]
    VTS, 1998, pp:354-361 [Conf]
  5. Markus Seuring, Krishnendu Chakrabarty
    Space Compaction of Test Responses for IP Cores Using Orthogonal Transmission Functions. [Citation Graph (0, 0)][DBLP]
    VTS, 2000, pp:213-220 [Conf]
  6. Markus Seuring, Michael Gössel
    A Structural Method for Output Compaction of Sequential Automata Implemented as Circuits. [Citation Graph (0, 0)][DBLP]
    WIA, 1999, pp:158-163 [Conf]
  7. Adit D. Singh, Markus Seuring, Michael Gössel, Egor S. Sogomonyan
    Multimode scan: Test per clock BIST for IP cores. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Design Autom. Electr. Syst., 2003, v:8, n:4, pp:491-505 [Journal]
  8. Markus Seuring
    Combining Scan Test and Built-in Self Test. [Citation Graph (0, 0)][DBLP]
    J. Electronic Testing, 2006, v:22, n:3, pp:297-299 [Journal]

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