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Publications of Author

1. Itsuo Takanami, Tadayoshi Horita
   Self-reconstruction of mesh-arrays with 1 1/2 -track switches by digital neural circuits. [Citation Graph (0, 0)][DBLP]
   DFT, 1997, pp:218-226 [Conf]
   
2. Tadayoshi Horita, Takurou Murata, Itsuo Takanami
   A Multiple-Weight-and-Neuron-Fault Tolerant Digital Multilayer Neural Network. [Citation Graph (0, 0)][DBLP]
   DFT, 2006, pp:554-562 [Conf]
   
3. Tadayoshi Horita, Itsuo Takanami
   A System for Efficiently Self-Reconstructing E-1 1 \over 2 -Track Switch Torus Arrays. [Citation Graph (0, 0)][DBLP]
   ISPAN, 2000, pp:44-49 [Conf]
   
4. Tadayoshi Horita, Itsuo Takanami
   A Polynomial Time Algorithm for Reconfiguring the 1 1/2 Track-Switch Model with PE and Bus faults. [Citation Graph (0, 0)][DBLP]
   ISPAN, 1997, pp:16-22 [Conf]
   
5. Tadayoshi Horita, Itsuo Takanami
   Fault Tolerant Processor Arrays Based on 1 1/2-Track Switch with Generalized Spare Distributions. [Citation Graph (0, 0)][DBLP]
   ISPAN, 1999, pp:135-137 [Conf]
   
6. I. Takanami, T. Horita
   A built-in self-reconfigurable scheme for 3D mesh arrays. [Citation Graph (0, 0)][DBLP]
   ISPAN, 1997, pp:458-464 [Conf]
   
7. Tadayoshi Horita, Itsuo Takanami
   A System for Efficiently Self-Reconstructing 1½-Track Switch Torus Arrays. [Citation Graph (0, 0)][DBLP]
   PDPTA, 2000, pp:- [Conf]
   
8. Tadayoshi Horita, Itsuo Takanami
   Analytical Results for Reconfiguration of E-11/2- Track Switch Torus Arrays with Multiple Fault Types. [Citation Graph (0, 0)][DBLP]
   PRDC, 2001, pp:233-240 [Conf]
   
9. Tadayoshi Horita, Itsuo Takanami
   Fault-Tolerant Processor Arrays Based on the 1½-Track Switches with Flexible Spare Distributions. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 2000, v:49, n:6, pp:542-552 [Journal]
   
10. 
    An Implementation of a Fault-Tolerant 2D Systolic Array on FPGAs and Its Evaluation. [Citation Graph (, )][DBLP]
    
    
11. 
    A Computer Cluster for Tests of Parallel Programming Environments Including Operating Systems. [Citation Graph (, )][DBLP]
    
    
12. 
    Novel Value Injection Learning Methods Which Make Multilayer Neural Networks Multiple-Weight-and-Neuron-Fault Tolerant. [Citation Graph (, )][DBLP]