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Nobuo Tsuda: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Tetsuji Satoh, Hideaki Takeda, Nobuo Tsuda
    A Compact Multiway Merge Sorter using Linear-Array Comparators. [Citation Graph (1, 0)][DBLP]
    FODO, 1989, pp:223-227 [Conf]
  2. Nobuo Tsuda
    Fault-Tolerant Ring- and Toroidal Mesh-Connected Processor Arrays Able to Enhance Emulation of Hypercubes. [Citation Graph (0, 0)][DBLP]
    DFT, 2000, pp:222-230 [Conf]
  3. Nobuo Tsuda
    ABL-Tree: A Constant Diameter Interconnection Network for Reconfigurable Processor Arrays Capable of Distributed Communication . [Citation Graph (0, 0)][DBLP]
    DFT, 2001, pp:143-148 [Conf]
  4. Nobuo Tsuda
    Fault-Tolerant Hierarchical Interconnection Networks Constructed by Additional Bypass Linking with Graph-Node Coloring. [Citation Graph (0, 0)][DBLP]
    DFT, 1997, pp:227-233 [Conf]
  5. Nobuo Tsuda, Tatsuyuki Shimizu
    Reconfigurable Mesh-Connected Processor Arrays Using Row-Column Bypassing and Direct Replacement. [Citation Graph (0, 0)][DBLP]
    ISPAN, 2000, pp:24-29 [Conf]
  6. Nobuo Tsuda
    Configurable PC Clusters Using a Hierarchical Complete-Connection-Based Switching Network. [Citation Graph (0, 0)][DBLP]
    PRDC, 2002, pp:153-162 [Conf]
  7. Nobuo Tsuda
    Fault-Tolerant Processor Arrays Using Additional Bypass Linking Allocated by Graph-Node Coloring. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2000, v:49, n:5, pp:431-442 [Journal]

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