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Pramodchandran N. Variyam:
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Publications of Author
- Pramodchandran N. Variyam, Abhijit Chatterjee
Specification-Driven Test Design for Analog Circuits. [Citation Graph (0, 0)][DBLP] DFT, 1998, pp:335-340 [Conf]
- Pramodchandran N. Variyam, Abhijit Chatterjee
Test generation for comprehensive testing of linear analog circuits using transient response sampling. [Citation Graph (0, 0)][DBLP] ICCAD, 1997, pp:382-385 [Conf]
- Kranthi K. Pinjala, Bruce C. Kim, Pramodchandran N. Variyam
Automatic Diagnostic Program Generation for Mixed Signal Load Board. [Citation Graph (0, 0)][DBLP] ITC, 2003, pp:403-409 [Conf]
- Pramodchandran N. Variyam
Increasing the IDDQ test resolution using current prediction. [Citation Graph (0, 0)][DBLP] ITC, 2000, pp:217-224 [Conf]
- Pramodchandran N. Variyam, Vinay Agrawal
Measuring code edges of ADCs using interpolation and its application to offset and gain error testing. [Citation Graph (0, 0)][DBLP] ITC, 2000, pp:349-357 [Conf]
- Pramodchandran N. Variyam, Abhijit Chatterjee
FLYER: Fast Fault Simulation of Linear Analog Circuits Using Polynomial Waveform and Perturbed State Representation. [Citation Graph (0, 0)][DBLP] VLSI Design, 1997, pp:408-412 [Conf]
- Pramodchandran N. Variyam, Junwei Hou, Abhijit Chatterjee
Test Generation for Analog Circuits Using Partial Numerical Simulation. [Citation Graph (0, 0)][DBLP] VLSI Design, 1999, pp:597-602 [Conf]
- Achintya Halder, Abhijit Chatterjee, Pramodchandran N. Variyam, John Ridley
Measuring Stray Capacitance on Tester Hardware. [Citation Graph (0, 0)][DBLP] VTS, 2002, pp:351-356 [Conf]
- Pramodchandran N. Variyam, Abhijit Chatterjee
Enhancing Test Effectiveness for Analog Circuits Using Synthesized Measurements. [Citation Graph (0, 0)][DBLP] VTS, 1998, pp:132-137 [Conf]
- Pramodchandran N. Variyam, Abhijit Chatterjee, Naveena Nagi
Low-cost and efficient digital-compatible BIST for analog circuits using pulse response sampling. [Citation Graph (0, 0)][DBLP] VTS, 1997, pp:261-266 [Conf]
- Pramodchandran N. Variyam, Junwei Hou, Abhijit Chatterjee
Efficient Test Generation for Transient Testing of Analog Circuits Using Partial Numerical Simulation. [Citation Graph (0, 0)][DBLP] VTS, 1999, pp:214-219 [Conf]
- Heebyung Yoon, Pramodchandran N. Variyam, Abhijit Chatterjee, Naveena Nagi
Hierarchical Statistical Inference Model for Specification Based Testing of Analog Circuits. [Citation Graph (0, 0)][DBLP] VTS, 1998, pp:145-151 [Conf]
- Pramodchandran N. Variyam, Abhijit Chatterjee
Digital-Compatible BIST for Analog Circuits Using Transient Response Sampling. [Citation Graph (0, 0)][DBLP] IEEE Design & Test of Computers, 2000, v:17, n:3, pp:106-115 [Journal]
- John M. Hitchcock, Aduri Pavan, Pramodchandran N. Variyam
Partial Bi-Immunity and NP-Completeness [Citation Graph (0, 0)][DBLP] Electronic Colloquium on Computational Complexity (ECCC), 2004, v:, n:025, pp:- [Journal]
- Pramodchandran N. Variyam, Abhijit Chatterjee
Specification-driven test generation for analog circuits. [Citation Graph (0, 0)][DBLP] IEEE Trans. on CAD of Integrated Circuits and Systems, 2000, v:19, n:10, pp:1189-1201 [Journal]
- Pramodchandran N. Variyam, Sasikumar Cherubal, Abhijit Chatterjee
Prediction of analog performance parameters using fast transienttesting. [Citation Graph (0, 0)][DBLP] IEEE Trans. on CAD of Integrated Circuits and Systems, 2002, v:21, n:3, pp:349-361 [Journal]
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