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Chennian Di: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Hua Xue, Chennian Di, Jochen A. G. Jess
    Fast Multi-Layer Critical Area Computation. [Citation Graph (0, 0)][DBLP]
    DFT, 1993, pp:117-124 [Conf]
  2. Hua Xue, Chennian Di, Jochen A. G. Jess
    Probability Analysis for CMOS Floating Gate Faults. [Citation Graph (0, 0)][DBLP]
    EDAC-ETC-EUROASIC, 1994, pp:443-448 [Conf]
  3. Hua Xue, Chennian Di, Jochen A. G. Jess
    A net-oriented method for realistic fault analysis. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1993, pp:78-83 [Conf]
  4. Chennian Di, Jochen A. G. Jess
    On Accurate Modeling and Efficient Simulation of CMOS Opens. [Citation Graph (0, 0)][DBLP]
    ITC, 1993, pp:875-882 [Conf]
  5. Chennian Di, Jochen A. G. Jess
    An efficient CMOS bridging fault simulator: with SPICE accuracy. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1996, v:15, n:9, pp:1071-1080 [Journal]
  6. José Pineda de Gyvez, Chennian Di
    IC defect sensitivity for footprint-type spot defects. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1992, v:11, n:5, pp:638-658 [Journal]

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