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Michael Vinov: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Yehuda Naveh, Michal Rimon, Itai Jaeger, Yoav Katz, Michael Vinov, Eitan Marcus, Gil Shurek
    Constraint-Based Random Stimuli Generation for Hardware Verification. [Citation Graph (0, 0)][DBLP]
    AAAI, 2006, pp:- [Conf]
  2. Allon Adir, Yaron Arbetman, Bella Dubrov, Yossi Lichtenstein, Michal Rimon, Michael Vinov, Massimo A. Calligaro, Andrew Cofler, Gabriel Duffy
    VLIW: a case study of parallelism verification. [Citation Graph (0, 0)][DBLP]
    DAC, 2005, pp:779-782 [Conf]
  3. Michael L. Behm, John M. Ludden, Yossi Lichtenstein, Michal Rimon, Michael Vinov
    Industrial experience with test generation languages for processor verification. [Citation Graph (0, 0)][DBLP]
    DAC, 2004, pp:36-40 [Conf]
  4. Allon Adir, Eli Almog, Laurent Fournier, Eitan Marcus, Michal Rimon, Michael Vinov, Avi Ziv
    Genesys-Pro: Innovations in Test Program Generation for Functional Processor Verification. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2004, v:21, n:2, pp:84-93 [Journal]
  5. Shady Copty, Itai Jaeger, Yoav Katz, Michael Vinov
    Intelligent Interleaving of Scenarios: A Novel Approach to System Level Test Generation. [Citation Graph (0, 0)][DBLP]
    DAC, 2007, pp:891-895 [Conf]

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