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Title:
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Gang Qu: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Pushkin R. Pari, Jane Lin, Lin Yuan, Gang Qu
    Generating 'Random' 3-SAT Instances with Specific Solution Space Structure. [Citation Graph (0, 0)][DBLP]
    AAAI, 2004, pp:960-961 [Conf]
  2. Lin Yuan, Pushkin R. Pari, Gang Qu
    Finding Redundant Constraints for FSM Minimization. [Citation Graph (0, 0)][DBLP]
    AAAI, 2004, pp:976-977 [Conf]
  3. Aydin O. Balkan, Gang Qu, Uzi Vishkin
    A Mesh-of-Trees Interconnection Network for Single-Chip Parallel Processing. [Citation Graph (0, 0)][DBLP]
    ASAP, 2006, pp:73-80 [Conf]
  4. Shaoxiong Hua, Pushkin R. Pari, Gang Qu
    Dual-Processor Design of Energy Efficient Fault-Tolerant System. [Citation Graph (0, 0)][DBLP]
    ASAP, 2006, pp:239-244 [Conf]
  5. Vida Kianzad, Shuvra S. Bhattacharyya, Gang Qu
    CASPER: An Integrated Energy-Driven Approach for Task Graph Scheduling on Distributed Embedded Systems. [Citation Graph (0, 0)][DBLP]
    ASAP, 2005, pp:191-197 [Conf]
  6. Lin Yuan, Gang Qu
    Design Space Exploration for Energy-Efficient Secure Sensor Network. [Citation Graph (0, 0)][DBLP]
    ASAP, 2002, pp:88-0 [Conf]
  7. Shaoxiong Hua, Gang Qu
    Power minimization techniques on distributed real-time systems by global and local slack management. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 2005, pp:830-835 [Conf]
  8. Gang Qu, Jennifer L. Wong, Miodrag Potkonjak
    Fair watermarking techniques. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 2000, pp:55-60 [Conf]
  9. Lin Yuan, Gang Qu, Tiziano Villa, Alberto L. Sangiovanni-Vincentelli
    FSM re-engineering and its application in low power state encoding. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 2005, pp:254-259 [Conf]
  10. Shaoxiong Hua, Gang Qu
    Energy-efficient dual-voltage soft real-time system with (m, k)-firm deadline guarantee. [Citation Graph (0, 0)][DBLP]
    CASES, 2004, pp:116-123 [Conf]
  11. Andrew E. Caldwell, Hyun-Jin Choi, Andrew B. Kahng, Stefanus Mantik, Miodrag Potkonjak, Gang Qu, Jennifer L. Wong
    Effective Iterative Techniques for Fingerprinting Design IP. [Citation Graph (0, 0)][DBLP]
    DAC, 1999, pp:843-848 [Conf]
  12. Inki Hong, Darko Kirovski, Gang Qu, Miodrag Potkonjak, Mani B. Srivastava
    Power Optimization of Variable Voltage Core-Based Systems. [Citation Graph (0, 0)][DBLP]
    DAC, 1998, pp:176-181 [Conf]
  13. Shaoxiong Hua, Gang Qu, Shuvra S. Bhattacharyya
    Energy reduction techniques for multimedia applications with tolerance to deadline misses. [Citation Graph (0, 0)][DBLP]
    DAC, 2003, pp:131-136 [Conf]
  14. Farinaz Koushanfar, Gang Qu
    Hardware Metering. [Citation Graph (0, 0)][DBLP]
    DAC, 2001, pp:490-493 [Conf]
  15. Gang Qu
    Publicly Detectable Techniques for the Protection of Virtual Components. [Citation Graph (0, 0)][DBLP]
    DAC, 2001, pp:474-479 [Conf]
  16. Gang Qu, Miodrag Potkonjak
    Fingerprinting intellectual property using constraint-addition. [Citation Graph (0, 0)][DBLP]
    DAC, 2000, pp:587-592 [Conf]
  17. Gang Qu, Naoyuki Kawabe, Kimiyoshi Usami, Miodrag Potkonjak
    Function-level power estimation methodology for microprocessors. [Citation Graph (0, 0)][DBLP]
    DAC, 2000, pp:810-813 [Conf]
  18. Gang Qu, Jennifer L. Wong, Miodrag Potkonjak
    Optimization-Intensive Watermarking Techniques for Decision Problems. [Citation Graph (0, 0)][DBLP]
    DAC, 1999, pp:33-36 [Conf]
  19. Lin Yuan, Gang Qu
    Enhanced leakage reduction Technique by gate replacement. [Citation Graph (0, 0)][DBLP]
    DAC, 2005, pp:47-50 [Conf]
  20. Shaoxiong Hua, Gang Qu, Shuvra S. Bhattacharyya
    Energy-Efficient Multi-processor Implementation of Embedded Software. [Citation Graph (0, 0)][DBLP]
    EMSOFT, 2003, pp:257-273 [Conf]
  21. Shaoxiong Hua, Gang Qu
    On-line Voltage Scheduling for Multimedia Applications. [Citation Graph (0, 0)][DBLP]
    ESTImedia, 2003, pp:24-31 [Conf]
  22. Adarsh K. Jain, Lin Yuan, Pushkin R. Pari, Gang Qu
    Zero overhead watermarking technique for FPGA designs. [Citation Graph (0, 0)][DBLP]
    ACM Great Lakes Symposium on VLSI, 2003, pp:147-152 [Conf]
  23. Lin Yuan, Gang Qu, Ankur Srivastava
    VLSI CAD tool protection by birthmarking design solutions. [Citation Graph (0, 0)][DBLP]
    ACM Great Lakes Symposium on VLSI, 2005, pp:341-344 [Conf]
  24. Yu Chen, Andrew B. Kahng, Gang Qu, Alexander Zelikovsky
    The associative-skew clock routing problem. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1999, pp:168-172 [Conf]
  25. Shaoxiong Hua, Gang Qu
    Approaching the Maximum Energy Saving on Embedded Systems with Multiple Voltages. [Citation Graph (0, 0)][DBLP]
    ICCAD, 2003, pp:26-29 [Conf]
  26. Gang Qu
    What is the Limit of Energy Saving by Dynamic Voltage Scaling? [Citation Graph (0, 0)][DBLP]
    ICCAD, 2001, pp:560-0 [Conf]
  27. Gang Qu, Miodrag Potkonjak
    Analysis of watermarking techniques for graph coloring problem. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1998, pp:190-193 [Conf]
  28. Gang Qu, Miodrag Potkonjak
    Power minimization using system-level partitioning of applications with quality of service requirements. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1999, pp:343-346 [Conf]
  29. Gang Qu, Miodrag Potkonjak
    Techniques for energy minimization of communication pipelines. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1998, pp:597-600 [Conf]
  30. Lin Yuan, Sean Leventhal, Gang Qu
    Temperature-aware leakage minimization technique for real-time systems. [Citation Graph (0, 0)][DBLP]
    ICCAD, 2006, pp:761-764 [Conf]
  31. Gang Qu
    Keyless Public Watermarking for Intellectual Property Authentication. [Citation Graph (0, 0)][DBLP]
    Information Hiding, 2001, pp:96-111 [Conf]
  32. Gang Qu, Miodrag Potkonjak
    Hiding Signatures in Graph Coloring Solutions. [Citation Graph (0, 0)][DBLP]
    Information Hiding, 1999, pp:348-367 [Conf]
  33. Farinaz Koushanfar, Gang Qu, Miodrag Potkonjak
    Intellectual Property Metering. [Citation Graph (0, 0)][DBLP]
    Information Hiding, 2001, pp:81-95 [Conf]
  34. Lin Yuan, Pushkin R. Pari, Gang Qu
    Soft IP Protection: Watermarking HDL Codes. [Citation Graph (0, 0)][DBLP]
    Information Hiding, 2004, pp:224-238 [Conf]
  35. Lin Yuan, Gang Qu
    Information Hiding in Finite State Machine. [Citation Graph (0, 0)][DBLP]
    Information Hiding, 2004, pp:340-354 [Conf]
  36. Lige Yu, Lin Yuan, Gang Qu, Anthony Ephremides
    Energy-driven detection scheme with guaranteed accuracy. [Citation Graph (0, 0)][DBLP]
    IPSN, 2006, pp:284-291 [Conf]
  37. Pushkin R. Pari, Lin Yuan, Gang Qu
    How many solutions does a SAT instance have? [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 2004, pp:209-212 [Conf]
  38. Gang Qu, Darko Kirovski, Miodrag Potkonjak, Mani B. Srivastava
    Energy minimization of system pipelines using multiple voltages. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:362-365 [Conf]
  39. Aydin O. Balkan, Gang Qu, Uzi Vishkin
    Arbitrate-and-move primitives for high throughput on-chip interconnection networks. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 2004, pp:441-444 [Conf]
  40. Deepak N. Agarwal, Sumitkumar N. Pamnani, Gang Qu, Donald Yeung
    Transferring performance gain from software prefetching to energy reduction. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 2004, pp:241-244 [Conf]
  41. Shaoxiong Hua, Gang Qu
    QoS-driven scheduling for multimedia applications. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 2004, pp:125-128 [Conf]
  42. Gang Qu, Miodrag Potkonjak
    Energy minimization with guaranteed quality of service. [Citation Graph (0, 0)][DBLP]
    ISLPED, 2000, pp:43-49 [Conf]
  43. Gang Qu, Miodrag Potkonjak
    Achieving utility arbitrarily close to the optimal with limited energy. [Citation Graph (0, 0)][DBLP]
    ISLPED, 2000, pp:125-130 [Conf]
  44. Gang Qu, Malena R. Mesarina, Miodrag Potkonjak
    System Synthesis of Synchronous Multimedia Applications. [Citation Graph (0, 0)][DBLP]
    ISSS, 1999, pp:128-133 [Conf]
  45. Shaoxiong Hua, Gang Qu
    A New Quality of Service Metric for Hard/Soft Real-Time Applications. [Citation Graph (0, 0)][DBLP]
    ITCC, 2003, pp:347-351 [Conf]
  46. Seapahn Meguerdichian, Farinaz Koushanfar, Gang Qu, Miodrag Potkonjak
    Exposure in wireless Ad-Hoc sensor networks. [Citation Graph (0, 0)][DBLP]
    MOBICOM, 2001, pp:139-150 [Conf]
  47. Gang Qu
    Introducing The Concept Of Design Reuse Into Undergraduate Digital Design Curriculum. [Citation Graph (0, 0)][DBLP]
    MSE, 2003, pp:10-11 [Conf]
  48. Shaoxiong Hua, Gang Qu, Shuvra S. Bhattacharyya
    Exploring the Probabilistic Design Space of Multimedia Systems. [Citation Graph (0, 0)][DBLP]
    IEEE International Workshop on Rapid System Prototyping, 2003, pp:233-0 [Conf]
  49. Inki Hong, Gang Qu, Miodrag Potkonjak, Mani B. Srivastava
    Synthesis Techniques for Low-Power Hard Real-Time Systems on Variable Voltage Processors. [Citation Graph (0, 0)][DBLP]
    IEEE Real-Time Systems Symposium, 1998, pp:178-187 [Conf]
  50. Sean Leventhal, Lin Yuan, Neal K. Bambha, Shuvra S. Bhattacharyya, Gang Qu
    DSP Address Optimization Using Evolutionary Algorithms. [Citation Graph (0, 0)][DBLP]
    SCOPES, 2005, pp:91-98 [Conf]
  51. Giacomino Veltri, Qingfeng Huang, Gang Qu, Miodrag Potkonjak
    Minimal and maximal exposure path algorithms for wireless embedded sensor networks. [Citation Graph (0, 0)][DBLP]
    SenSys, 2003, pp:40-50 [Conf]
  52. Lin Yuan, Gang Qu, Lahouari Ghouti, Ahmed Bouridane
    VLSI Design IP Protection: Solutions, New Challenges, and Opportunities. [Citation Graph (0, 0)][DBLP]
    AHS, 2006, pp:469-476 [Conf]
  53. Gang Qu, Naoyuki Kawabe, Kimiyoshi Usami, Miodrag Potkonjak
    Code Coverage-Based Power Estimation Techniques for Microprocessors. [Citation Graph (0, 0)][DBLP]
    Journal of Circuits, Systems, and Computers, 2002, v:11, n:5, pp:557-0 [Journal]
  54. Andrew E. Caldwell, Hyun-Jin Choi, Andrew B. Kahng, Stefanus Mantik, Miodrag Potkonjak, Gang Qu, Jennifer L. Wong
    Effective iterative techniques for fingerprinting design IP. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 2004, v:23, n:2, pp:208-215 [Journal]
  55. Inki Hong, Darko Kirovski, Gang Qu, Miodrag Potkonjak, Mani B. Srivastava
    Power optimization of variable-voltage core-based systems. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1999, v:18, n:12, pp:1702-1714 [Journal]
  56. Gang Qu
    Publicly detectable watermarking for intellectual property authentication in VLSI design. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 2002, v:21, n:11, pp:1363-1368 [Journal]
  57. Jennifer L. Wong, Gang Qu, Miodrag Potkonjak
    Optimization-intensive watermarking techniques for decision problems. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 2004, v:23, n:1, pp:119-127 [Journal]
  58. Lin Yuan, Gang Qu
    Analysis of energy reduction on dynamic voltage scaling-enabled systems. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 2005, v:24, n:12, pp:1827-1837 [Journal]
  59. Shaoxiong Hua, Gang Qu, Shuvra S. Bhattacharyya
    Energy-efficient embedded software implementation on multiprocessor system-on-chip with multiple voltages. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Embedded Comput. Syst., 2006, v:5, n:2, pp:321-341 [Journal]
  60. Gang Qu, Miodrag Potkonjak
    System synthesis of synchronous multimedia applications. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Embedded Comput. Syst., 2003, v:2, n:1, pp:74-97 [Journal]
  61. Jennifer L. Wong, Gang Qu, Miodrag Potkonjak
    Power minimization in QoS sensitive systems. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 2004, v:12, n:6, pp:553-561 [Journal]
  62. Lin Yuan, Gang Qu
    A combined gate replacement and input vector control approach for leakage current reduction. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 2006, v:14, n:2, pp:173-182 [Journal]
  63. Seapahn Megerian, Farinaz Koushanfar, Gang Qu, Giacomino Veltri, Miodrag Potkonjak
    Exposure in Wireless Sensor Networks: Theory and Practical Solutions. [Citation Graph (0, 0)][DBLP]
    Wireless Networks, 2002, v:8, n:5, pp:443-454 [Journal]
  64. Gang Qu, Miodrag Potkonjak, Mile K. Stojcev
    Book review: Intellectual property protection in VLSI designs: Theory and practice, Hardcover, pp 183, plus XIX, Kluwer Academic Publishers, Boston, 2003, ISBN 1-4020-7320-8. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2004, v:44, n:4, pp:705-706 [Journal]
  65. Shaoxiong Hua, Gang Qu, Shuvra S. Bhattacharyya
    Probabilistic design of multimedia embedded systems. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Embedded Comput. Syst., 2007, v:6, n:3, pp:- [Journal]
  66. Gang Qu, Miodrag Potkonjak
    Techniques for energy-efficient communication pipeline design. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 2002, v:10, n:5, pp:542-549 [Journal]

  67. An area-efficient high-throughput hybrid interconnection network for single-chip parallel processing. [Citation Graph (, )][DBLP]


  68. Information hiding for trusted system design. [Citation Graph (, )][DBLP]


  69. Behavioral level dual-vth design for reduced leakage power with thermal awareness. [Citation Graph (, )][DBLP]


  70. Simultaneous input vector selection and dual threshold voltage assignment for static leakage minimization. [Citation Graph (, )][DBLP]


  71. Power Management of Multicore Multiple Voltage Embedded Systems by Task Scheduling. [Citation Graph (, )][DBLP]


  72. Leakage optimization using transistor-level dual threshold voltage cell library. [Citation Graph (, )][DBLP]


  73. ALT-DVS: Dynamic Voltage Scaling with Awareness of Leakage and Temperature for Real-Time Systems. [Citation Graph (, )][DBLP]


  74. Improving Key Distribution forWireless Sensor Networks. [Citation Graph (, )][DBLP]


  75. A Genetic Algorithm for Solving Patient- Priority- Based Elective Surgery Scheduling Problem. [Citation Graph (, )][DBLP]


  76. A Hardware-Assisted Data Hiding Based Approach in Building High-Performance Trusted Computing Systems. [Citation Graph (, )][DBLP]


  77. Temperature-Aware Cooperative Ring Oscillator PUF. [Citation Graph (, )][DBLP]


  78. SecureGo: A Hardware-Software Co-Protection against Identity Theft in Online Transaction. [Citation Graph (, )][DBLP]


  79. Fingerprint - Iris Fusion Based Identification System Using a Single Hamming Distance Matcher. [Citation Graph (, )][DBLP]


  80. AffyProbeMiner: a web resource for computing or retrieving accurately redefined Affymetrix probe sets. [Citation Graph (, )][DBLP]


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