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Publications of Author

1. Behzad Akbarpour, Sofiène Tahar
   The Application of Formal Verification to SPW Designs. [Citation Graph (0, 0)][DBLP]
   DSD, 2003, pp:325-333 [Conf]
   
2. Behzad Akbarpour, Sofiène Tahar
   A Methodology for the Formal Verification of FFT Algorithms in HOL. [Citation Graph (0, 0)][DBLP]
   FMCAD, 2004, pp:37-51 [Conf]
   
3. Abu Nasser M. Abdullah, Behzad Akbarpour, Sofiène Tahar
   Formal Analysis and Verification of an OFDM Modem Design using HOL. [Citation Graph (0, 0)][DBLP]
   FMCAD, 2006, pp:189-190 [Conf]
   
4. Behzad Akbarpour, Sofiène Tahar
   Modeling System C Fixed-Point Arithmetic in HOL. [Citation Graph (0, 0)][DBLP]
   ICFEM, 2003, pp:206-225 [Conf]
   
5. Behzad Akbarpour, Abdelkader Dekdouk, Sofiène Tahar
   Formalization of Cadence SPW Fixed-Point Arithmetic in HOL. [Citation Graph (0, 0)][DBLP]
   IFM, 2002, pp:185-204 [Conf]
   
6. Behzad Akbarpour, Sofiène Tahar
   Error Analysis of Digital Filters Using Theorem Proving. [Citation Graph (0, 0)][DBLP]
   TPHOLs, 2004, pp:1-17 [Conf]
   
7. Behzad Akbarpour, Sofiène Tahar, Abdelkader Dekdouk
   Formalization of Fixed-Point Arithmetic in HOL. [Citation Graph (0, 0)][DBLP]
   Formal Methods in System Design, 2005, v:27, n:1-2, pp:173-200 [Journal]
   
8. Behzad Akbarpour, Sofiène Tahar
   An approach for the formal verification of DSP designs using Theorem proving. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. on CAD of Integrated Circuits and Systems, 2006, v:25, n:8, pp:1441-1457 [Journal]
   
9. Behzad Akbarpour, Lawrence C. Paulson
   Extending a Resolution Prover for Inequalities on Elementary Functions. [Citation Graph (0, 0)][DBLP]
   LPAR, 2007, pp:47-61 [Conf]
   
10. 
    MetiTarski: An Automatic Prover for the Elementary Functions. [Citation Graph (, )][DBLP]
    
    
11. 
    Formal verification of analog circuits in the presence of noise and process variation. [Citation Graph (, )][DBLP]
    
    
12. 
    Formal Reasoning about Expectation Properties for Continuous Random Variables. [Citation Graph (, )][DBLP]
    
    
13. 
    Formal verification of analog designs using MetiTarski. [Citation Graph (, )][DBLP]
    
    
14. 
    Applications of MetiTarski in the Verification of Control and Hybrid Systems. [Citation Graph (, )][DBLP]
    
    
15. 
    Verifying a Synthesized Implementation of IEEE-754 Floating-Point Exponential Function using HOL. [Citation Graph (, )][DBLP]
    
    
16. 
    Error Analysis and Verification of an IEEE 802.11 OFDM Modem using Theorem Proving. [Citation Graph (, )][DBLP]