|
Search the dblp DataBase
A. Neslin Ismailoglu:
[Publications]
[Author Rank by year]
[Co-authors]
[Prefers]
[Cites]
[Cited by]
Publications of Author
- O. Benderli, Yusuf Çagatay Tekmen, A. Neslin Ismailoglu
A Real Time, Low Latency, FPGA Implementation of the 2-D Discrete Wavelet Transformation for Streaming Image Applications. [Citation Graph (0, 0)][DBLP] DSD, 2003, pp:384-391 [Conf]
- Refik Sever, A. Neslin Ismailoglu, Yusuf Çagatay Tekmen, Murat Askar, Burak Okcan
A High Speed FPGA Implementation of the Rijndael Algorithm. [Citation Graph (0, 0)][DBLP] DSD, 2004, pp:358-362 [Conf]
- Soner Yesil, A. Neslin Ismailoglu, Yusuf Çagatay Tekmen, Murat Askar
Two fast RSA implementations using high-radix montgomery algorithm. [Citation Graph (0, 0)][DBLP] ISCAS (2), 2004, pp:557-560 [Conf]
- Refik Sever, A. Neslin Ismailoglu, Yusuf Çagatay Tekmen, Murat Askar
A high speed ASIC implementation of the Rijndael algorithm. [Citation Graph (0, 0)][DBLP] ISCAS (2), 2004, pp:541-544 [Conf]
- A. Neslin Ismailoglu, O. Benderli, Soner Yesil, Refik Sever, Burak Okcan, O. Sengul, Rusen Öktem
GEZGIN & GEZGIN-2: Adaptive Real-Time Image Processing Subsystems for Earth Observing Small Satellites. [Citation Graph (0, 0)][DBLP] AHS, 2006, pp:351-358 [Conf]
- A. Neslin Ismailoglu, Murat Askar
Application of Bit-level Pipelining to Delay Insensitive Null Convention Adders. [Citation Graph (0, 0)][DBLP] ISCAS, 2007, pp:3259-3262 [Conf]
SDIVA: Structural Delay Insensitivity Verification Analysis Method for Bit-Level Pipelined Systolic Arrays with Early Output Evaluation. [Citation Graph (, )][DBLP]
Search in 0.001secs, Finished in 0.002secs
|