The SCEAS System
Navigation Menu

Search the dblp DataBase

Title:
Author:

Maik Boden: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Maik Boden, Manfred Koegst, José Luis Tiburcio Badía, Steffen Rülke
    Cost-Efficient Implementation of Adaptive Finite State Machines. [Citation Graph (0, 0)][DBLP]
    DSD, 2004, pp:144-151 [Conf]
  2. Maik Boden, Jörg Schneider, Klaus Feske, Steffen Rülke
    Enhanced Reusability for SoC-Based HW/SW Co-Design. [Citation Graph (0, 0)][DBLP]
    DSD, 2002, pp:94-101 [Conf]
  3. Maik Boden, Alex Gleich, Steffen Rülke, Ulrich Nageldinger
    A Low-Cost Realization of an Adaptable Protocol Processing Unit. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2005, pp:- [Conf]
  4. Maik Boden, Steffen Rülke, Jürgen Becker
    A high-level target-precise model for designing reconfigurable HW tasks. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2006, pp:- [Conf]
  5. Maik Boden, Thomas Fiebig, Torsten Meibner, Steffen Rülke, Jürgen Becker
    High-Level Synthesis of HW Tasks Targeting Run-Time Reconfigurable FPGAs. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2007, pp:1-8 [Conf]

  6. GePaRD - A High-Level Generation Flow for Partially Reconfigurable Designs. [Citation Graph (, )][DBLP]


Search in 0.001secs, Finished in 0.001secs
NOTICE1
System may not be available sometimes or not working properly, since it is still in development with continuous upgrades
NOTICE2
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP
 
System created by asidirop@csd.auth.gr [http://users.auth.gr/~asidirop/] © 2002
for Data Engineering Laboratory, Department of Informatics, Aristotle University © 2002