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Klaus Feske:
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- Maik Boden, Jörg Schneider, Klaus Feske, Steffen Rülke
Enhanced Reusability for SoC-Based HW/SW Co-Design. [Citation Graph (0, 0)][DBLP] DSD, 2002, pp:94-101 [Conf]
- Manfred Koegst, Günter Franke, Steffen Rülke, Klaus Feske
Low Power Design of FSMs by State Assignment and Disabling Self-Loops. [Citation Graph (0, 0)][DBLP] EUROMICRO, 1997, pp:323-330 [Conf]
- Manfred Koegst, Günter Franke, Steffen Rülke, Klaus Feske
Multi-Criterial State Assignment for Low Power FSM Design. [Citation Graph (0, 0)][DBLP] EUROMICRO, 1998, pp:10261-10268 [Conf]
- Klaus Feske, Georg Heinrich, Berndt Fritzsche, Mark Langer
SoC Based Low Cost Design of Digital Audio Broadcasting Transport Network Applications. [Citation Graph (0, 0)][DBLP] FPL, 2002, pp:1105-1109 [Conf]
- Klaus Feske, Sven Mulka, Manfred Koegst, Günter Elst
Technology-driven FSM partitioning for synthesis of large sequential circuits targeting lookup-table based FPGAs. [Citation Graph (0, 0)][DBLP] FPL, 1997, pp:235-244 [Conf]
- Klaus Feske, Michael Scholz, Günther Döring, Denis Nareike
Rapid FPGA Prototyping of a DAB Test Data Generator Using Protocol Compiler. [Citation Graph (0, 0)][DBLP] FPL, 1999, pp:243-252 [Conf]
- Mirko Benz, Klaus Feske, Uwe Hatnik, Peter Schwarz
TCP/IP Protocol Engine System Simulation. [Citation Graph (0, 0)][DBLP] PROMS, 2001, pp:155-164 [Conf]
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