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Kimmo Kuusilinna: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Jouni Riihimäki, Väinö Helminen, Kimmo Kuusilinna, Timo D. Hämäläinen
    Distributing SoC Simulations over a Network of Computers. [Citation Graph (0, 0)][DBLP]
    DSD, 2003, pp:447-450 [Conf]
  2. Jarno Vanne, Eero Aho, Kimmo Kuusilinna, Timo D. Hämäläinen
    Enhanced Configurable Parallel Memory Architecture. [Citation Graph (0, 0)][DBLP]
    DSD, 2002, pp:28-37 [Conf]
  3. Kimmo Kuusilinna, Pasi Liimatainen, Timo Hämäläinen, Jukka Saarinen
    Reconfiguration Mechanism for an IP Block Based Interconnection. [Citation Graph (0, 0)][DBLP]
    EUROMICRO, 1999, pp:1042-1045 [Conf]
  4. Chen Chang, Kimmo Kuusilinna, Brian C. Richards, Robert W. Brodersen
    Implementation of BEE: a real-time large-scale hardware emulation engine. [Citation Graph (0, 0)][DBLP]
    FPGA, 2003, pp:91-99 [Conf]
  5. Eero Aho, Jarno Vanne, Kimmo Kuusilinna, Timo Hämäläinen
    Block-level parallel processing for scaling evenly divisible frames. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 2005, pp:1134-1137 [Conf]
  6. Vesa Lahtinen, Erno Salminen, Kimmo Kuusilinna, Timo D. Hämäläinen
    Comparison of synthesized bus and crossbar interconnection architectures. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 2003, pp:433-436 [Conf]
  7. Erno Salminen, Timo D. Hämäläinen, Tero Kangas, Kimmo Kuusilinna, Jukka Saarinen
    Interfacing multiple processors in a system-on-chip video encoder. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2001, pp:478-481 [Conf]
  8. Tero Kangas, Kimmo Kuusilinna, Timo Hämäläinen
    TDMA-based communication scheduling in system-on-chip video encoder. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 2002, pp:369-372 [Conf]
  9. Vesa Lahtinen, Kimmo Kuusilinna, Timo Hämäläinen
    Optimizing finite state machines for system-on-chip communication. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 2002, pp:485-488 [Conf]
  10. Jouni Riihimäki, Erno Salminen, Kimmo Kuusilinna, Timo Hämäläinen
    Parameter optimization tool for enhancing on-chip network performance. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2002, pp:61-64 [Conf]
  11. Chen Chang, Kimmo Kuusilinna, Brian C. Richards, Allen Chen, Nathan Chan, Robert W. Brodersen, Borivoje Nikolic
    Rapid Design and Analysis of Communication Systems Using the BEE Hardware Emulation Environment. [Citation Graph (0, 0)][DBLP]
    IEEE International Workshop on Rapid System Prototyping, 2003, pp:148-0 [Conf]
  12. Erno Salminen, Tero Kangas, Jouni Riihimäki, Vesa Lahtinen, Kimmo Kuusilinna, Timo D. Hämäläinen
    Benchmarking Mesh and Hierarchical Bus Networks in System-on-Chip Context. [Citation Graph (0, 0)][DBLP]
    SAMOS, 2005, pp:354-363 [Conf]
  13. Tero Kangas, Jouni Riihimäki, Erno Salminen, Vesa Lahtinen, Heikki Orsila, Kimmo Kuusilinna, Timo D. Hämäläinen
    A Communication-Centric Design Flow for HIBI-Based SoCs. [Citation Graph (0, 0)][DBLP]
    SAMOS, 2004, pp:474-483 [Conf]
  14. Erno Salminen, Vesa Lahtinen, Tero Kangas, Jouni Riihimäki, Kimmo Kuusilinna, Timo D. Hämäläinen
    HIBI v.2 Communication Network for System-on-Chip. [Citation Graph (0, 0)][DBLP]
    SAMOS, 2004, pp:413-422 [Conf]
  15. Eero Aho, Jarno Vanne, Kimmo Kuusilinna, Timo D. Hämäläinen
    Comments on "Winscale: an image-scaling algorithm using an area pixel Model". [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Circuits Syst. Video Techn., 2005, v:15, n:3, pp:454-455 [Journal]
  16. Jarno Vanne, Eero Aho, Timo Hämäläinen, Kimmo Kuusilinna
    A High-Performance Sum of Absolute Difference Implementation for Motion Estimation. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Circuits Syst. Video Techn., 2006, v:16, n:7, pp:876-883 [Journal]
  17. Tero Kangas, Petri Kukkala, Heikki Orsila, Erno Salminen, Marko Hännikäinen, Timo D. Hämäläinen, Jouni Riihimäki, Kimmo Kuusilinna
    UML-based multiprocessor SoC design framework. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Embedded Comput. Syst., 2006, v:5, n:2, pp:281-320 [Journal]
  18. Vesa Lahtinen, Kimmo Kuusilinna, Tero Kangas, Timo Hämäläinen
    Interconnection scheme for continuous-media systems-on-a-chip. [Citation Graph (0, 0)][DBLP]
    Microprocessors and Microsystems, 2002, v:26, n:3, pp:123-138 [Journal]
  19. Erno Salminen, Tero Kangas, Vesa Lahtinen, Jouni Riihimäki, Kimmo Kuusilinna, Timo D. Hämäläinen
    Benchmarking mesh and hierarchical bus networks in system-on-chip context. [Citation Graph (0, 0)][DBLP]
    Journal of Systems Architecture, 2007, v:53, n:8, pp:477-488 [Journal]
  20. Eero Aho, Jarno Vanne, Timo D. Hämäläinen, Kimmo Kuusilinna
    Configurable implementation of parallel memory based real-time video downscaler. [Citation Graph (0, 0)][DBLP]
    Microprocessors and Microsystems, 2007, v:31, n:5, pp:283-292 [Journal]
  21. Erno Salminen, Tero Kangas, Timo D. Hämäläinen, Jouni Riihimäki, Vesa Lahtinen, Kimmo Kuusilinna
    HIBI Communication Network for System-on-Chip. [Citation Graph (0, 0)][DBLP]
    VLSI Signal Processing, 2006, v:43, n:2-3, pp:185-205 [Journal]
  22. Tero Kangas, Timo D. Hämäläinen, Kimmo Kuusilinna
    Scalable Architecture for SoC Video Encoders. [Citation Graph (0, 0)][DBLP]
    VLSI Signal Processing, 2006, v:44, n:1-2, pp:79-95 [Journal]

  23. A case for multi-channel memories in video recording. [Citation Graph (, )][DBLP]


  24. Memory access characteristics of H.264 video encoder on embedded processor. [Citation Graph (, )][DBLP]


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