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Rainer Schaffer:
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- Rainer Schaffer, Renate Merker, Francky Catthoor
Causality Constraints for Processor Architectures with Sub-Word Parallelism. [Citation Graph (0, 0)][DBLP] DSD, 2003, pp:82-89 [Conf]
- Mathias Kortke, Jan Müller, Rainer Schaffer, Sebastian Siegel, Renate Merker, Jürgen Kelber
A Parallel Hardware-Software System for Signal Processing Algorithms. [Citation Graph (0, 0)][DBLP] PARELEC, 2004, pp:215-220 [Conf]
- Rainer Schaffer, Renate Merker, Francky Catthoor
Systematic Design of Programs with Sub-Word Parallelism. [Citation Graph (0, 0)][DBLP] PARELEC, 2002, pp:393-398 [Conf]
- Rainer Schaffer, Renate Merker, Francky Catthoor
Derivation of Packing Instructions for Exploiting Sub-Word Parallelism. [Citation Graph (0, 0)][DBLP] PARELEC, 2006, pp:167-172 [Conf]
- Sebastian Siegel, Rainer Schaffer, Renate Merker
Efficient Realization of the Edge Detection Algorithm on a Processor Array with Parallelism on Two Levels. [Citation Graph (0, 0)][DBLP] PARELEC, 2006, pp:173-180 [Conf]
- Frank Hannig, Hritam Dutta, Alexey Kupriyanov, Jürgen Teich, Rainer Schaffer, Sebastian Siegel, Renate Merker, Ronan Keryell, Bernard Pottier, Daniel Chillet, Daniel Menard, Olivier Sentieys
Co-Design of Massively Parallel Embedded Processor Architectures. [Citation Graph (0, 0)][DBLP] ReCoSoC, 2005, pp:27-34 [Conf]
- Rainer Schaffer, Renate Merker, Francky Catthoor
Combining Background Memory Management and Regular Array Co-Partitioning, Illustrated on a Full Motion Estimation Kernel. [Citation Graph (0, 0)][DBLP] VLSI Design, 2000, pp:104-109 [Conf]
- Jan Müller, Dirk Fimmel, Renate Merker, Rainer Schaffer
A Hardware-Software System for Tomographic Reconstruction. [Citation Graph (0, 0)][DBLP] Journal of Circuits, Systems, and Computers, 2003, v:12, n:2, pp:203-0 [Journal]
- Rainer Schaffer, Francky Catthoor, Renate Merker
Combining Background Memory Management and Regular Array Co-Partitioning, Illustrated on a Full Motion Estimation Kernel. [Citation Graph (0, 0)][DBLP] Parallel Algorithms Appl., 2000, v:15, n:3-4, pp:201-228 [Journal]
- Hritam Dutta, Frank Hannig, Alexey Kupriyanov, Dmitrij Kissler, Jürgen Teich, Rainer Schaffer, Sebastian Siegel, Renate Merker, Bernard Pottier
Massively Parallel Processor Architectures: A Co-design Approach. [Citation Graph (0, 0)][DBLP] ReCoSoC, 2007, pp:61-68 [Conf]
- Rainer Schaffer, Renate Merker
Parameterized Mapping of Algorithms onto Processor Arrays with Sub-Word Parallelism. [Citation Graph (0, 0)][DBLP] ICSAMOS, 2006, pp:99-106 [Conf]
Utilization of all Levels of Parallelism in a Processor Array with Subword Parallelism. [Citation Graph (, )][DBLP]
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