The SCEAS System
Navigation Menu

Search the dblp DataBase

Title:
Author:

João Canas Ferreira: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Miguel L. Silva, João Canas Ferreira
    Using a Tightly-Coupled Pipeline in Dynamically Reconfigurable Platform FPGAs. [Citation Graph (0, 0)][DBLP]
    DSD, 2005, pp:383-387 [Conf]
  2. José Carlos Alves, João Canas Ferreira, C. Albuquerque, José F. Oliveira, J. Soeiro Ferreira, José Silva Matos
    FAFNER-Accelerating Nesting Problems with FPGAs. [Citation Graph (0, 0)][DBLP]
    FCCM, 1999, pp:168-0 [Conf]
  3. João Canas Ferreira, José Silva Matos
    A Prototype System for Rapid Application Development using Dynamically Reconfigurable Hardware. [Citation Graph (0, 0)][DBLP]
    FCCM, 1998, pp:280-281 [Conf]
  4. João Canas Ferreira, José Silva Matos
    A Development Support System for Applications That Use Dynamically Reconfigurable Hardware. [Citation Graph (0, 0)][DBLP]
    FPL, 2004, pp:886-890 [Conf]
  5. João Canas Ferreira, Miguel M. Silva
    Run-Time Reconfiguration Support for FPGAs with Embedded CPUs: The Hardware Layer. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2005, pp:- [Conf]
  6. José Silva Matos, João Canas Ferreira, Ana C. Leão, José M. Silva
    An Approach to Testability Improvement of Mixed-Signal Boards. [Citation Graph (0, 0)][DBLP]
    ISCAS, 1994, pp:161-164 [Conf]
  7. José Silva Matos, Ana C. Leão, João Canas Ferreira
    Control and Observation of Analog Nodes in Mixed-Signal Boards. [Citation Graph (0, 0)][DBLP]
    ITC, 1993, pp:323-331 [Conf]
  8. Miguel L. Silva, João Canas Ferreira
    Support for partial run-time reconfiguration of platform FPGAs. [Citation Graph (0, 0)][DBLP]
    Journal of Systems Architecture, 2006, v:52, n:12, pp:709-726 [Journal]

  9. Generation of partial FPGA configurations at run-time. [Citation Graph (, )][DBLP]


Search in 0.003secs, Finished in 0.004secs
NOTICE1
System may not be available sometimes or not working properly, since it is still in development with continuous upgrades
NOTICE2
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP
 
System created by asidirop@csd.auth.gr [http://users.auth.gr/~asidirop/] © 2002
for Data Engineering Laboratory, Department of Informatics, Aristotle University © 2002