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Nirmal R. Saxena: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Subhasish Mitra, Nirmal R. Saxena, Edward J. McCluskey
    Techniques for Estimation of Design Diversity for Combinational Logic Circuits. [Citation Graph (0, 0)][DBLP]
    DSN, 2001, pp:25-36 [Conf]
  2. Wei-Je Huang, Nirmal R. Saxena, Edward J. McCluskey
    A Reliable LZ Data Compressor on Reconfigurable Coprocessors. [Citation Graph (0, 0)][DBLP]
    FCCM, 2000, pp:249-258 [Conf]
  3. Shu-Yi Yu, Nirmal R. Saxena, Edward J. McCluskey
    An ACS Robotic Control Algorithm with Fault Tolerant Capabilities. [Citation Graph (0, 0)][DBLP]
    FCCM, 2000, pp:175-184 [Conf]
  4. David Chih-Wei Chang, Nirmal R. Saxena
    Concurrent Error Detection/Correction in the HAL MMU Chip. [Citation Graph (0, 0)][DBLP]
    FTCS, 1993, pp:630-635 [Conf]
  5. Nirmal R. Saxena, Chien Chen, Ravi Swami, Hideki Osone, Shalesh Thusoo, David Lyon, David Chang, Anand Dharmaraj, Niteen Patkar, Yizhi Lu, Ben Chia
    Error Detection and Handling in a Superscalar, Speculative Out-of-Order Execution Processor System. [Citation Graph (0, 0)][DBLP]
    FTCS, 1995, pp:464-471 [Conf]
  6. Nirmal R. Saxena, Piero Franco, Edward J. McCluskey
    Bounds on Signature Analysis Aliasing for Random Testing. [Citation Graph (0, 0)][DBLP]
    FTCS, 1991, pp:104-113 [Conf]
  7. Nirmal R. Saxena, Ravi Tangirala, Ajay Srivastava
    Algorithmic Synthesis of High Level Tests for Data Path Designs. [Citation Graph (0, 0)][DBLP]
    FTCS, 1993, pp:360-369 [Conf]
  8. Babu Turumella, Aiman Kabakibo, Manjunath Bogadi, Karakunakara Menon, Shaleah Thusoo, Long Nguyen, Nirmal R. Saxena, Michael Chow
    Design Verification of a Super-Scalar RISC Processor. [Citation Graph (0, 0)][DBLP]
    FTCS, 1995, pp:472-477 [Conf]
  9. Subhasish Mitra, Nirmal R. Saxena, Edward J. McCluskey
    A design diversity metric and reliability analysis for redundant systems. [Citation Graph (0, 0)][DBLP]
    ITC, 1999, pp:662-671 [Conf]
  10. Irith Pomeranz, Nirmal R. Saxena, Richard Reeve, Paritosh Kulkarni, Yan A. Li
    Generation of Test Cases for Hardware Design Verification of a Super-Scalar Fetch Processor. [Citation Graph (0, 0)][DBLP]
    ITC, 1996, pp:904-913 [Conf]
  11. Nirmal R. Saxena, Piero Franco, Edward J. McCluskey
    Refined Bounds on Signature Analysis Aliasing for Random Testing. [Citation Graph (0, 0)][DBLP]
    ITC, 1991, pp:818-827 [Conf]
  12. Chaohuang Zeng, Nirmal R. Saxena, Edward J. McCluskey
    Finite state machine synthesis with concurrent error detection. [Citation Graph (0, 0)][DBLP]
    ITC, 1999, pp:672-679 [Conf]
  13. David R. Barach, Jaspal Kohli, John Slice, Marc Spaulding, Rajeev Bharadhwaj, Don Hudson, Cliff Neighbors, Nirmal R. Saxena, Rolland Crunk
    HALSIM - A Very Fast SPARC-V9 Behavioral Model. [Citation Graph (0, 0)][DBLP]
    MASCOTS, 1995, pp:249-252 [Conf]
  14. Subhasish Mitra, Nirmal R. Saxena, Edward J. McCluskey
    Fault Escapes in Duplex Systems. [Citation Graph (0, 0)][DBLP]
    VTS, 2000, pp:453-458 [Conf]
  15. Subhasish Mitra, Wei-Je Huang, Nirmal R. Saxena, Shu-Yi Yu, Edward J. McCluskey
    Reconfigurable Architecture for Autonomous Self-Repair. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2004, v:21, n:3, pp:228-240 [Journal]
  16. Nirmal R. Saxena, Santiago Fernández-Gomez, Wei-Je Huang, Subhasish Mitra, Shu-Yi Yu, Edward J. McCluskey
    Dependable Computing and Online Testing in Adaptive and Configurable Systems. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2000, v:17, n:1, pp:29-41 [Journal]
  17. Daniel Boley, Gene H. Golub, Samy Makar, Nirmal R. Saxena, Edward J. McCluskey
    Floating Point Fault Tolerance with Backward Error Assertions. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1995, v:44, n:2, pp:302-311 [Journal]
  18. Subhasish Mitra, Nirmal R. Saxena, Edward J. McCluskey
    A Design Diversity Metric and Analysis of Redundant Systems. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2002, v:51, n:5, pp:498-510 [Journal]
  19. Subhasish Mitra, Nirmal R. Saxena, Edward J. McCluskey
    Efficient Design Diversity Estimation for Combinational Circuits. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2004, v:53, n:11, pp:1483-1492 [Journal]
  20. John P. Robinson, Nirmal R. Saxena
    A Unified View of Test Compression Methods. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1987, v:36, n:1, pp:94-99 [Journal]
  21. Nirmal R. Saxena, David Chih-Wei Chang, Kevin Dawallu, Jaspal Kohli, Pat Helland
    Fault-Tolerant Features in the HaL Memory Management Unit. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1995, v:44, n:2, pp:170-180 [Journal]
  22. Nirmal R. Saxena, Piero Franco, Edward J. McCluskey
    Simple Bounds on Serial Signature Analysis Aliasing for Random Testing. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1992, v:41, n:5, pp:638-645 [Journal]
  23. Nirmal R. Saxena, Edward J. McCluskey
    Control-Flow Checking Using Watchdog Assists and Extended-Precision Checksums. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1990, v:39, n:4, pp:554-559 [Journal]
  24. Nirmal R. Saxena, Edward J. McCluskey
    Analysis of Checksums, Extended-Precision Checksums, and Cyclic Redundancy Checks. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1990, v:39, n:7, pp:969-975 [Journal]
  25. Nirmal R. Saxena, Edward J. McCluskey
    Counting Two-State Transition-Tour Sequences. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1996, v:45, n:11, pp:1337-1342 [Journal]
  26. Nirmal R. Saxena, Edward J. McCluskey
    Parallel Signatur Analysis Design with Bounds on Aliasing. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1997, v:46, n:4, pp:425-438 [Journal]
  27. Nirmal R. Saxena, John P. Robinson
    Accumulator Compression Testing. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1986, v:35, n:4, pp:317-321 [Journal]
  28. John P. Robinson, Nirmal R. Saxena
    Simultaneous signature and syndrome compression. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1988, v:7, n:5, pp:584-589 [Journal]
  29. Nirmal R. Saxena, John P. Robinson
    Syndrome and transition count are uncorrelated. [Citation Graph (0, 0)][DBLP]
    IEEE Transactions on Information Theory, 1988, v:34, n:1, pp:64-69 [Journal]
  30. Nirmal R. Saxena, Edward J. McCluskey
    Linear Complexity Assertions for Sorting. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Software Eng., 1994, v:20, n:6, pp:424-431 [Journal]

  31. How Many Test Patterns are Useless? [Citation Graph (, )][DBLP]


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