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J. L. Rainard: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. G. Masseboeuf, J. Pulou, J. L. Rainard
    Hierarchical Test Analysis of VLSI Circuits for Random BIST. [Citation Graph (0, 0)][DBLP]
    EDCC, 1994, pp:271-288 [Conf]
  2. Mireille Jacomino, J. L. Rainard, Rene David
    Fault Detection By Consumption Measurement in CMOS Circuits. [Citation Graph (0, 0)][DBLP]
    Fehlertolerierende Rechensysteme, 1987, pp:83-94 [Conf]
  3. P. Thorel, J. L. Rainard, A. Botta, A. Chemarin, J. Majos
    Implementing Boundary-Scan and Pseudo-Random BIST in an Asynchronous Transfer Mode Switch. [Citation Graph (0, 0)][DBLP]
    ITC, 1991, pp:131-139 [Conf]

  4. Some relationships between delay testing and stuck-open testing in CMOS circuits. [Citation Graph (, )][DBLP]

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