The SCEAS System
Navigation Menu

Search the dblp DataBase

Title:
Author:

Roland N. Ibbett: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Roland N. Ibbett, P. C. Capon
    The Development of the MU5 Computer System. [Citation Graph (1, 0)][DBLP]
    Commun. ACM, 1978, v:21, n:1, pp:13-24 [Journal]
  2. Alexander R. Robertson, Roland N. Ibbett
    Simulation of the MC88000 Microprocessor System on a Transputer Network. [Citation Graph (0, 0)][DBLP]
    EDMCC, 1991, pp:264-273 [Conf]
  3. Alexander R. Robertson, Roland N. Ibbett
    HASE: A Flexible High Performance Architecture Simulator. [Citation Graph (0, 0)][DBLP]
    HICSS (1), 1994, pp:261-270 [Conf]
  4. D. J. Rogers, Roland N. Ibbett
    Xbar: A VLSI Circuit for Bit-sliced Packet Switching Networks. [Citation Graph (0, 0)][DBLP]
    IFIP Congress (1), 1992, pp:562-570 [Conf]
  5. N. A. Yannacopoulos, Roland N. Ibbett, R. W. Holgate
    Performance Measurements of the MU5 Primary Instruction Pipeline. [Citation Graph (0, 0)][DBLP]
    IFIP Congress, 1977, pp:471-476 [Conf]
  6. Roland N. Ibbett, P. C. Capon, Nigel P. Topham
    MU6V: A Parallel Vector Processing System. [Citation Graph (0, 0)][DBLP]
    ISCA, 1985, pp:136-144 [Conf]
  7. Roland N. Ibbett, T. M. Hopkins, K. I. M. McKinnon
    Architectural Mechanisms to Support Sparse Vector Processing. [Citation Graph (0, 0)][DBLP]
    ISCA, 1989, pp:64-71 [Conf]
  8. Fred W. Howell, R. Williams, Roland N. Ibbett
    Hierarchical Architecture Design and Simulation Environment. [Citation Graph (0, 0)][DBLP]
    MASCOTS, 1994, pp:363-366 [Conf]
  9. T. Kelly, Roland N. Ibbett
    Parallelism versus Performance - Matching Parallel Hardware to Software. [Citation Graph (0, 0)][DBLP]
    PARCO, 1993, pp:437-444 [Conf]
  10. Roland N. Ibbett
    The University of Manchester MU5 Project. [Citation Graph (0, 0)][DBLP]
    IEEE Annals of the History of Computing, 1999, v:21, n:1, pp:24-33 [Journal]
  11. Roland N. Ibbett
    The MU5 instruction pipeline. [Citation Graph (0, 0)][DBLP]
    Comput. J., 1972, v:15, n:1, pp:42-50 [Journal]
  12. Roland N. Ibbett, David A. Edwards, T. P. Hopkins, C. K. Cadogan, D. A. Train
    Centrenet - A High Performance Local Area Network. [Citation Graph (0, 0)][DBLP]
    Comput. J., 1985, v:28, n:3, pp:231-242 [Journal]
  13. Roland N. Ibbett, M. A. Husband
    The MU5 Name Store. [Citation Graph (0, 0)][DBLP]
    Comput. J., 1977, v:20, n:3, pp:227-231 [Journal]
  14. Roland N. Ibbett, Pat E. Heywood, Fred W. Howell
    HASE: A Flexible Toolset for Computer Architects. [Citation Graph (0, 0)][DBLP]
    Comput. J., 1995, v:38, n:10, pp:755-764 [Journal]
  15. Andrew D. McGettrick, Roger D. Boyle, Roland N. Ibbett, John Lloyd, Gillian Lovegrove, Keith Mander
    Grand Challenges in Computing: Education - A Summary. [Citation Graph (0, 0)][DBLP]
    Comput. J., 2005, v:48, n:1, pp:42-48 [Journal]
  16. Sadaf Alam, Roland N. Ibbett, Frédéric Mallet
    Simulation of a computer architecture for quantum chromodynamics calculations. [Citation Graph (0, 0)][DBLP]
    ACM Crossroads, 2003, v:9, n:3, pp:16-23 [Journal]
  17. Roland N. Ibbett
    HASE DLX Simulation Model. [Citation Graph (0, 0)][DBLP]
    IEEE Micro, 2000, v:20, n:3, pp:57-65 [Journal]
  18. R. W. Holgate, Roland N. Ibbett
    An Analysis of Instruction-Fetching Strategies in Pipelined Computers. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1980, v:29, n:4, pp:325-329 [Journal]
  19. Paul S. Coe, Fred W. Howell, Roland N. Ibbett, Laurence M. Williams
    Technical Note: A Hierarchical Computer Architecture Design and Simulation Environment. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Model. Comput. Simul., 1998, v:8, n:4, pp:431-446 [Journal]
  20. Roland N. Ibbett, Juan Carlos Diaz y Carballo, D. A. W. Dolman
    Computer architecture simulation models. [Citation Graph (0, 0)][DBLP]
    ITiCSE, 2006, pp:353- [Conf]

  21. WWW visualisation of computer architecture simulations. [Citation Graph (, )][DBLP]


  22. An interactive environment for the teaching of computer architecture. [Citation Graph (, )][DBLP]


Search in 0.003secs, Finished in 0.004secs
NOTICE1
System may not be available sometimes or not working properly, since it is still in development with continuous upgrades
NOTICE2
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP
 
System created by asidirop@csd.auth.gr [http://users.auth.gr/~asidirop/] © 2002
for Data Engineering Laboratory, Department of Informatics, Aristotle University © 2002