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Publications of Author

1. Jörg Langeheine, Joachim Becker, Simon Fölling, Karlheinz Meier, Johannes Schemmel
   A Cmos Fpta Chip For Intrinsic Hardware Evolution Of Analog Electronic Circuits. [Citation Graph (0, 0)][DBLP]
   Evolvable Hardware, 2001, pp:172-175 [Conf]
   
2. Jörg Langeheine, Karlheinz Meier, Johannes Schemmel
   Intrinsic Evolution of Quasi DC Solutions for Transistor Level Analog Electronic Circuits Using a CMOS FPTA Chip. [Citation Graph (0, 0)][DBLP]
   Evolvable Hardware, 2002, pp:75-84 [Conf]
   
3. Jörg Langeheine, Karlheinz Meier, Johannes Schemmel, Martin Trefzer
   Intrinsic Evolution of Digital-to-Analog Converters Using a CMOS FPTA Chip. [Citation Graph (0, 0)][DBLP]
   Evolvable Hardware, 2004, pp:18-25 [Conf]
   
4. Martin Trefzer, Jörg Langeheine, Johannes Schemmel, Karlheinz Meier
   New Genetic Operators to Facilitate Understanding of Evolved Transistor Circuits. [Citation Graph (0, 0)][DBLP]
   Evolvable Hardware, 2004, pp:217-224 [Conf]
   
5. Jörg Langeheine, Martin Trefzer, Daniel Brüderle, Karlheinz Meier, Johannes Schemmel
   On the Evolution of Analog Electronic Circuits Using Building Blocks on a CMOS FPTA. [Citation Graph (0, 0)][DBLP]
   GECCO (1), 2004, pp:1316-1327 [Conf]
   
6. Jörg Langeheine, Joachim Becker, Simon Fölling, Karlheinz Meier, Johannes Schemmel
   Initial Studies of a New VLSI Field Programmable Transistor Array. [Citation Graph (0, 0)][DBLP]
   ICES, 2001, pp:62-73 [Conf]
   
7. Jörg Langeheine, Simon Fölling, Karlheinz Meier, Johannes Schemmel
   Towards a Silicon Primordial Soup: A Fast Approach to Hardware Evolution with a VLSI Transistor Array. [Citation Graph (0, 0)][DBLP]
   ICES, 2000, pp:123-132 [Conf]
   
8. Martin Trefzer, Jörg Langeheine, Karlheinz Meier, Johannes Schemmel
   Operational Amplifiers: An Example for Multi-objective Optimization on an Analog Evolvable Hardware Platform. [Citation Graph (0, 0)][DBLP]
   ICES, 2005, pp:86-97 [Conf]
   
9. Martin Trefzer, Jörg Langeheine, Karlheinz Meier, Johannes Schemmel
   A Modular Framework for the Evolution of Circuits on Configurable Transistor Array Architectures. [Citation Graph (0, 0)][DBLP]
   AHS, 2006, pp:32-42 [Conf]