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Taher Daud: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Adrian Stoica, Didier Keymeulen, Ricardo Salem Zebulum, Anilkumar Thakoor, Taher Daud, Gerhard Klimeck, Y. Jin, Raoul Tawel, Vu Duong
    Evolution of Analog Circuits on Field Programmable Transistor Arrays. [Citation Graph (0, 0)][DBLP]
    Evolvable Hardware, 2000, pp:99-108 [Conf]
  2. Taher Daud, Ricardo Salem Zebulum, Tuan A. Duong, Ian Ferguson, Curtis Padgett, Adrian Stoica, Anil Thakoor
    Speed Enhancement with Soft Computing Hardware. [Citation Graph (0, 0)][DBLP]
    ICANN, 2003, pp:1049-1056 [Conf]
  3. Tuan A. Duong, Taher Daud
    Cascade Error Projection: A Learning Algorithm for Hardware Implementation. [Citation Graph (0, 0)][DBLP]
    IWANN (1), 1999, pp:450-457 [Conf]
  4. Adrian Stoica, Ricardo Salem Zebulum, Didier Keymeulen, Taher Daud
    Transistor-Level Circuit Experiments Using Evolvable Hardware. [Citation Graph (0, 0)][DBLP]
    IWINAC (2), 2005, pp:366-375 [Conf]
  5. Tien-Hsin Chao, Taher Daud, Anilkumar Thakoor
    HONORS: : Advanced miniature processing hardware for ATR applications. [Citation Graph (0, 0)][DBLP]
    Neurocomputing, 1999, v:28, n:1-3, pp:233-244 [Journal]
  6. Silvio P. Eberhardt, Taher Daud, D. A. Kerns, T. X. Brown, A. P. Thakoor
    Competitive neural architecture for hardware solution to the assignment problem. [Citation Graph (0, 0)][DBLP]
    Neural Networks, 1991, v:4, n:4, pp:431-442 [Journal]
  7. Adrian Stoica, Didier Keymeulen, Ricardo Salem Zebulum, Mohammad Mojarradi, Srinivas Katkoori, Taher Daud
    Adaptive and Evolvable Analog Electronics for Space Applications. [Citation Graph (0, 0)][DBLP]
    ICES, 2007, pp:379-390 [Conf]
  8. Adrian Stoica, R. Zebulum, Didier Keymeulen, Raoul Tawel, Taher Daud, Anil Thakoor
    Reconfigurable VLSI architectures for evolvable hardware: from experimental field programmable transistor arrays to evolution-oriented chips. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 2001, v:9, n:1, pp:227-232 [Journal]

  9. Self-Reconfigurable Mixed-Signal Integrated Circuits Architecture Comprising a Field Programmable Analog Array and a General Purpose Genetic Algorithm IP Core. [Citation Graph (, )][DBLP]

  10. Self-Reconfigurable Analog Arrays: Off-The Shelf Adaptive Electronics for Space Applications. [Citation Graph (, )][DBLP]

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