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Aravind Dasu: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Ali Akoglu, Aravind Dasu, Sethuraman Panchanathan
    Cluster Extraction for Hybrid FPGA Architecture in Computation Intensive Applications. [Citation Graph (0, 0)][DBLP]
    ERSA, 2004, pp:296- [Conf]
  2. Aravind Dasu, Ali Akoglu, Sethuraman Panchanathan
    An Analysis Tool Set for Reconfigurable Media Processing. [Citation Graph (0, 0)][DBLP]
    Engineering of Reconfigurable Systems and Algorithms, 2003, pp:292-295 [Conf]
  3. Arvind Sudarsanam, Aravind Dasu, Sethuraman Panchanathan
    Task Scheduling of Control-Data Flow Graphs for Reconfigurable Architectures. [Citation Graph (0, 0)][DBLP]
    ERSA, 2004, pp:225-231 [Conf]
  4. Arvind Sudarsanam, Aravind Dasu
    A Fast and Efficient FPGA-Based Implementation for Solving a System of Linear Interval Equations. [Citation Graph (0, 0)][DBLP]
    FPT, 2005, pp:291-292 [Conf]
  5. Ali Akoglu, Aravind Dasu, Arvind Sudarsanam, Mayur Srinivasan, Sethuraman Panchanathan
    Pattern Recognition Tool to Detect Reconfigurable Patterns in MPEG4 Video Processing. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2002, pp:- [Conf]
  6. Aravind Dasu, Arvind Sudarsanam
    High Level - Application Analysis Techniques & Architectures - To Explore Design possibilities for Reduced Reconfiguration Area Overheads in FPGAs executing Compute Intensive Applications. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2005, pp:- [Conf]
  7. Aravind Dasu, Sethuraman Panchanathan
    Reconfigurable Media Processing. [Citation Graph (0, 0)][DBLP]
    ITCC, 2001, pp:300-0 [Conf]
  8. Aravind Dasu, Sethuraman Panchanathan
    Lifting kernel-based sprite codec. [Citation Graph (0, 0)][DBLP]
    VCIP, 2001, pp:86-98 [Conf]
  9. Aravind Dasu, Sethuraman Panchanathan
    Reconfigurable media processing. [Citation Graph (0, 0)][DBLP]
    Parallel Computing, 2002, v:28, n:7-8, pp:1111-1139 [Journal]
  10. Aravind Dasu, Sethuraman Panchanathan
    A survey of media processing approaches. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Circuits Syst. Video Techn., 2002, v:12, n:8, pp:633-0 [Journal]
  11. Aravind Dasu, Sethuraman Panchanathan
    A wavelet-based sprite codec. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Circuits Syst. Video Techn., 2004, v:14, n:2, pp:244-255 [Journal]
  12. Jonathan Phillips, Matthew Areno, Chris Rogers, Aravind Dasu, Brandon Eames
    A Reconfigurable Load Balancing Architecture for Molecular Dynamics. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2007, pp:1-6 [Conf]

  13. Hardware/Software Co-designed Extended Kalman Filter on an FPGA. [Citation Graph (, )][DBLP]


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