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Matti Tommiska:
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Publications of Author
- Kimmo U. Järvinen, Matti Tommiska, Jorma Skyttä
A Compact MD5 and SHA-1 Co-Implementation Utilizing Algorithm Similarities. [Citation Graph (0, 0)][DBLP] ERSA, 2005, pp:48-54 [Conf]
- Kimmo U. Järvinen, Matti Tommiska, Jorma Skyttä
A fully pipelined memoryless 17.8 Gbps AES-128 encryptor. [Citation Graph (0, 0)][DBLP] FPGA, 2003, pp:207-215 [Conf]
- Matti Tommiska
Special Arithmetic Operations on FPGAs. [Citation Graph (0, 0)][DBLP] FPGA, 1999, pp:253- [Conf]
- Antti Hämäläinen, Matti Tommiska, Jorma Skyttä
8 Gigabits per Second Implementation of the IDEA Cryptographic Algorithm. [Citation Graph (0, 0)][DBLP] FPL, 2002, pp:760-769 [Conf]
- Kimmo U. Järvinen, Matti Tommiska, Jorma Skyttä
A VHDL Generator for Elliptic Curve Cryptography. [Citation Graph (0, 0)][DBLP] FPL, 2004, pp:1098-1100 [Conf]
- Matti Tommiska, Jorma Skyttä
Dijkstra's Shortest Path Routing Algorithm in Reconfigurable Hardware. [Citation Graph (0, 0)][DBLP] FPL, 2001, pp:653-657 [Conf]
- Kimmo U. Järvinen, Matti Tommiska, Jorma Skyttä
Hardware Implementation Analysis of the MD5 Hash Algorithm. [Citation Graph (0, 0)][DBLP] HICSS, 2005, pp:- [Conf]
- Antti Hämäläinen, Matti Tommiska, Jorma Skyttä
FPGA-Based Implementation of a 59-Neuron Feedforward Neural Network with a 17.1 Gbps Interlayer Throughput. [Citation Graph (0, 0)][DBLP] IC-AI, 2004, pp:181-187 [Conf]
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