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Publications of Author

1. Nikolaos G. Bartzoudis, Alexandros G. Fragkiadakis, David J. Parish, Jose Luis Nunez, Mark Sandford
   Reconfigurable Computing and Active Networks. [Citation Graph (0, 0)][DBLP]
   Engineering of Reconfigurable Systems and Algorithms, 2003, pp:280-283 [Conf]
   
2. Jose Luis Nunez, Claudia Feregrino, Simon Jones, Stephen Bateman
   The X-MatchLITE FPGA-Based Data Compressor. [Citation Graph (0, 0)][DBLP]
   EUROMICRO, 1999, pp:1126-1132 [Conf]
   
3. Jose Luis Nunez, Claudia Feregrino, Stephen Bateman, Simon Jones
   The X-MatchLITE FPGA-Based Data Compressor. [Citation Graph (0, 0)][DBLP]
   FPGA, 1999, pp:255- [Conf]
   
4. Jose Luis Nunez, Claudia Feregrino, Simon Jones, Stephen Bateman
   X-MatchPRO: A ProASIC-Based 200 Mbytes/s Full-Duplex Lossless Data Compressor. [Citation Graph (0, 0)][DBLP]
   FPL, 2001, pp:613-617 [Conf]
   
5. Riad Stefo, Jose Luis Nunez, Claudia Feregrino, Sudipta Mahapatra, Simon Jones
   FPGA-Based Modelling Unit for High Speed Lossless Arithmetic Coding. [Citation Graph (0, 0)][DBLP]
   FPL, 2001, pp:643-647 [Conf]
   
6. Nikolaos G. Bartzoudis, Alexandros G. Fragkiadakis, David J. Parish, Jose Luis Nunez
   A System for Fault Detection and Reconfiguration of Hardware Based Active Networks. [Citation Graph (0, 0)][DBLP]
   IOLTS, 2004, pp:207-213 [Conf]
   
7. Mark Milward, Jose Luis Nunez, David Mulvaney
   Routing Strategies for High Speed Parallel Data Compression. [Citation Graph (0, 0)][DBLP]
   PDPTA, 2003, pp:635-641 [Conf]
   
8. Mark Milward, Jose Luis Nunez, David Mulvaney
   Design and Implementation of a Lossless Parallel High-Speed Data Compression System. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Parallel Distrib. Syst., 2004, v:15, n:6, pp:481-490 [Journal]