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Calvin Plett: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Fred Ma, John P. Knight, Calvin Plett
    Physical Resource Binding for a Coarse Grain Reconfigurable Array. [Citation Graph (0, 0)][DBLP]
    ERSA, 2004, pp:109-115 [Conf]
  2. Justin P. Abbott, Calvin Plett, John W. M. Rogers
    A low voltage CMOS multiplier for high frequency equalization. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 2005, pp:1936-1939 [Conf]
  3. Rony E. Amaya, Jorge Aguirre, Calvin Plett
    Gain bandwidth considerations in fully integrated distributed amplifiers implemented in silicon. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:273-276 [Conf]
  4. Walt T. Bax, Tom A. D. Riley, Calvin Plett, Miles A. Copeland
    A Sigma-Delta Frequency Discriminator Based Synthesizer. [Citation Graph (0, 0)][DBLP]
    ISCAS, 1995, pp:1-4 [Conf]
  5. Norman M. Filiol, Calvin Plett, Tom A. D. Riley, Miles A. Copeland
    Bit-Error Rate Measurements for A High Frequency Interpolated Frequency-Hopping Spread-Spectrum System. [Citation Graph (0, 0)][DBLP]
    ISCAS, 1995, pp:97-100 [Conf]
  6. Paul W. M. Laferriere, Dave Rahn, Calvin Plett, John W. M. Rogers
    A 5 GHz direct-conversion receiver with DC offset correction. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:269-272 [Conf]
  7. Shijun Yang, Ralph Mason, Calvin Plett
    6.5 mW CMOS low noise amplifier at 1.9 GHz. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:85-88 [Conf]
  8. Fred Ma, John P. Knight, Calvin Plett
    Physical resource binding for a coarse-grain reconfigurable array using evolutionary algorithms. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 2005, v:13, n:5, pp:553-563 [Journal]
  9. P. Popplewell, V. Karam, Atef Shamim, John W. M. Rogers, M. Cloutier, Calvin Plett
    5.2 GHz self-powered lock and roll radio using VCO injection-locking and on-chip antennas. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2006, pp:- [Conf]
  10. T. Lovitt, Calvin Plett, John W. M. Rogers
    A 0.13µm CMOS delay cell for 40 Gb/s FFE equalization. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2006, pp:- [Conf]
  11. Atef Shamim, P. Popplewell, V. Karam, L. Roy, John W. M. Rogers, Calvin Plett
    Silicon Differential Antenna/Inductor for Short Range Wireless Communication Applications. [Citation Graph (0, 0)][DBLP]
    CCECE, 2006, pp:94-97 [Conf]

  12. Low-power CMOS transceivers with on-chip antennas for short-range radio-frequency communication. [Citation Graph (, )][DBLP]


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