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Publications of Author

1. Lilian Bossuet, Guy Gogniat, Jean Luc Philippe
   Fast Design Space Exploration Method for Reconfigurable Architectures. [Citation Graph (0, 0)][DBLP]
   Engineering of Reconfigurable Systems and Algorithms, 2003, pp:65-71 [Conf]
   
2. Lilian Bossuet, Guy Gogniat, Jean Luc Philippe
   Communication Costs Driven Design Space Exploration for Reconfigurable Architectures. [Citation Graph (0, 0)][DBLP]
   FPL, 2003, pp:921-933 [Conf]
   
3. Lilian Bossuet, Wayne Burleson, Guy Gogniat, Vikas Anand, Andrew Laffely, Jean Luc Philippe
   Targeting Tiled Architectures in Design Exploration. [Citation Graph (0, 0)][DBLP]
   IPDPS, 2003, pp:172- [Conf]
   
4. Lilian Bossuet, Guy Gogniat, Wayne Burleson
   Dynamically Configurable Security for SRAM FPGA Bitstreams. [Citation Graph (0, 0)][DBLP]
   IPDPS, 2004, pp:- [Conf]
   
5. Lilian Bossuet, Guy Gogniat, Jean Luc Philippe
   Generic Design Space Exploration for Reconfigurable Architectures. [Citation Graph (0, 0)][DBLP]
   IPDPS, 2005, pp:- [Conf]
   
6. Sebastien Bilavarn, Guy Gogniat, Jean Luc Philippe, Lilian Bossuet
   Fast prototyping of reconfigurable architectures from a C program. [Citation Graph (0, 0)][DBLP]
   ISCAS (5), 2003, pp:589-592 [Conf]
   
7. Guy Gogniat, Wayne Burleson, Lilian Bossuet
   Configurable Computing for High-Security/High-Performance Ambient Systems. [Citation Graph (0, 0)][DBLP]
   SAMOS, 2005, pp:72-81 [Conf]
   
8. Sebastien Bilavarn, Guy Gogniat, Jean Luc Philippe, Lilian Bossuet
   Design Space Pruning Through Early Estimations of Area/Delay Tradeoffs for FPGA Implementations. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. on CAD of Integrated Circuits and Systems, 2006, v:25, n:10, pp:1950-1968 [Journal]
   
9. V. Fresnaud, Lilian Bossuet, Dominique Dallet, Serge Bernard, J. M. Janik, B. Agnus, Philippe Cauvet, Ph. Gandy
   A Low Cost Alternative Method for Harmonics Estimation in a BIST Context. [Citation Graph (0, 0)][DBLP]
   European Test Symposium, 2006, pp:193-198 [Conf]
   
10. 
    A new orthogonal online digital calibration for time-interleaved analog-to-digital converters. [Citation Graph (, )][DBLP]