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Publications of Author

1. Stephen Charlwood, Steven F. Quigley
   The Impact of Routing Architecture on Reconfiguration Overheads. [Citation Graph (0, 0)][DBLP]
   Engineering of Reconfigurable Systems and Algorithms, 2003, pp:102-110 [Conf]
   
2. Stephen J. Melnikoff, Steven F. Quigley, Martin J. Russell
   Implementing a Simple Continuous Speech Recognition System on an FPGA. [Citation Graph (0, 0)][DBLP]
   FCCM, 2002, pp:275-276 [Conf]
   
3. Benjamin Carrión Schäfer, Steven F. Quigley, Andrew H. C. Chan
   Analysis and Implementation of the Discrete Element Method Using a Dedicated Highly Parallel Architecture in Reconfigurable Computing. [Citation Graph (0, 0)][DBLP]
   FCCM, 2002, pp:173-181 [Conf]
   
4. Stephen Charlwood, Jonathan Mangnall, Steven F. Quigley
   System-Level Modelling for Performance Estimation of Reconfigurable Coprocessors. [Citation Graph (0, 0)][DBLP]
   FPL, 2002, pp:567-576 [Conf]
   
5. Stephen J. Melnikoff, Philip James-Roxby, Steven F. Quigley, Martin J. Russell
   Reconfigurable Computing for Speech Recognition: Preliminary Findings. [Citation Graph (0, 0)][DBLP]
   FPL, 2000, pp:495-504 [Conf]
   
6. Stephen J. Melnikoff, Steven F. Quigley, Martin J. Russell
   Implementing a Hidden Markov Model Speech Recognition System in Programmable Logic. [Citation Graph (0, 0)][DBLP]
   FPL, 2001, pp:81-90 [Conf]
   
7. Stephen J. Melnikoff, Steven F. Quigley, Martin J. Russell
   Speech Recognition on an FPGA Using Discrete and Continuous Hidden Markov Models. [Citation Graph (0, 0)][DBLP]
   FPL, 2002, pp:202-211 [Conf]
   
8. N. L. Miller, Steven F. Quigley
   A Novel Field Programmable Gat Array Architecture for High Speed Arithmetic Processing. [Citation Graph (0, 0)][DBLP]
   FPL, 1998, pp:386-390 [Conf]
   
9. Benjamin Carrión Schäfer, Steven F. Quigley, Andrew H. C. Chan
   Evaluation of an FPGA Implementation of the Discrete Element Method. [Citation Graph (0, 0)][DBLP]
   FPL, 2001, pp:306-314 [Conf]
   
10. Benjamin Carrión Schäfer, Steven F. Quigley, Andrew H. C. Chan
    Scalable Implementation of the Discrete Element Method on a Reconfigurable Computing Platform. [Citation Graph (0, 0)][DBLP]
    FPL, 2002, pp:925-934 [Conf]
    
11. Jonathan Mangnall, Steven F. Quigley
    System Level Simulation of a SIMD Active Memory Enhanced PC (Or, Why We Don't Want 100% Bandwidth Utilisation. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2003, pp:281- [Conf]
    
12. S. Pammu, Steven F. Quigley
    An Analogue CMOS Defuzzication Circuit with Representation of Triangular Membership Functions. [Citation Graph (0, 0)][DBLP]
    ISCAS, 1994, pp:495-498 [Conf]
    
13. B. Foruzandeh, Steven F. Quigley
    An analogue multilayer perceptron circuit with on-chip training. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 1999, pp:395-398 [Conf]
    
14. Dawn S. L. Dolcy, Costas C. Constantinou, Steven F. Quigley
    A Fokker-Planck equation method predicting Buffer occupancy in a single queue. [Citation Graph (0, 0)][DBLP]
    Computer Networks, 2007, v:51, n:8, pp:2198-2216 [Journal]
    
15. 
    An element-by-element preconditioned Conjugate Gradient solver of 3D tetrahedral finite elements on an FPGA coprocessor. [Citation Graph (, )][DBLP]
    
    
16. 
    Multi-degree smoother for low power consumption in single and multiple scan-chains BIST. [Citation Graph (, )][DBLP]
    
    
17. 
    A GMM-Based Speaker Identification System on FPGA. [Citation Graph (, )][DBLP]