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Chao You: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Jong-Ru Guo, Chao You, Michael Chu, Kuan Zhou, Young Uk Yim, Robert W. Heikaus, Russell P. Kraft, John F. McDonald
    A Novel Multi-Speed, Power Saving Architecture for SiGe HBT FPGA. [Citation Graph (0, 0)][DBLP]
    Engineering of Reconfigurable Systems and Algorithms, 2003, pp:181-187 [Conf]
  2. Jong-Ru Guo, Chao You, Michael Chu, Robert W. Heikaus, Kuan Zhou, Okan Erdogan, Jiedong Diao, Bryan S. Goda, Russell P. Kraft, John F. McDonald
    The gigahertz FPGA: design consideration and applications. [Citation Graph (0, 0)][DBLP]
    FPGA, 2004, pp:248- [Conf]
  3. Jong-Ru Guo, Chao You, Kuan Zhou, Bryan S. Goda, Russell P. Kraft, John F. McDonald
    A scalable 2 V, 20 GHz FPGA using SiGe HBT BiCMOS technology. [Citation Graph (0, 0)][DBLP]
    FPGA, 2003, pp:145-153 [Conf]
  4. Kuan Zhou, Michael Chu, Chao You, Jong-Ru Guo, Channakeshav, John Mayega, John F. McDonald, Russell P. Kraft, Bryan S. Goda
    A four-bit full adder implemented on fast SiGe FPGAs with novel power control scheme. [Citation Graph (0, 0)][DBLP]
    FPGA, 2003, pp:248- [Conf]
  5. Chao You, Jong-Ru Guo, Michael Chu, Russell P. Kraft, Bryan S. Goda, John F. McDonald
    A 11 GHz FPGA with Test Applications. [Citation Graph (0, 0)][DBLP]
    FPL, 2005, pp:101-105 [Conf]
  6. Chao You, Jong-Ru Guo, Russell P. Kraft, Michael Chu, Robert W. Heikaus, Okan Erdogan, Peter F. Curran, Bryan S. Goda, Kuan Zhou, John F. McDonald
    Gigahertz FPGA by SiGe BiCMOS Technology for Low Power, High Speed Computing with 3-D Memory. [Citation Graph (0, 0)][DBLP]
    FPL, 2003, pp:11-20 [Conf]
  7. Channakeshav, Kuan Zhou, Jong-Ru Guo, Chao You, Bryan S. Goda, Russell P. Kraft, John F. McDonald
    Fast SiGe HBT BiCMOS FPGAs with New Architecture and Power Saving Techniques. [Citation Graph (0, 0)][DBLP]
    FPL, 2002, pp:414-423 [Conf]
  8. Jong-Ru Guo, Chao You, Paul F. Curran, Michael Chu, Kuan Zhou, Jiedong Diao, A. George, Russell P. Kraft, John F. McDonald
    The 10GHz 4: 1 MUX and 1: 4 DEMUX implemented via the gigahertz SiGe FPGA. [Citation Graph (0, 0)][DBLP]
    ACM Great Lakes Symposium on VLSI, 2004, pp:141-144 [Conf]
  9. Chao You, Jong-Ru Guo, Russell P. Kraft, Kuan Zhou, Michael Chu, John F. McDonald
    A 5-20 GHz, low power FPGA implemented by SiGe HBT BiCMOS technology. [Citation Graph (0, 0)][DBLP]
    ACM Great Lakes Symposium on VLSI, 2003, pp:37-40 [Conf]
  10. Jong-Ru Guo, Chao You, Michael Chu, Okan Erdogan, Russell P. Kraft, John F. McDonald
    A High Speed Reconfigurable Gate Array for Gigahertz Applications. [Citation Graph (0, 0)][DBLP]
    ISVLSI, 2005, pp:124-129 [Conf]
  11. Jong-Ru Guo, Chao You, Kuan Zhou, Michael Chu, Peter F. Curran, Jiedong Diao, Bryan S. Goda, Russell P. Kraft, John F. McDonald
    A 10 GHz 4: 1 MUX and 1: 4 DEMUX implemented by a Gigahertz SiGe FPGA for fast ADC. [Citation Graph (0, 0)][DBLP]
    Integration, 2005, v:38, n:3, pp:525-540 [Journal]
  12. Kuan Zhou, Jong-Ru Guo, Chao You, John Mayega, Russell P. Kraft, T. Zhang, John F. McDonald, Bryan S. Goda
    Multi-ghz Sige Bicmos Fpgas with New Architecture and Novel Power Management Techniques. [Citation Graph (0, 0)][DBLP]
    Journal of Circuits, Systems, and Computers, 2005, v:14, n:2, pp:179-194 [Journal]
  13. Chao You, Jong-Ru Guo, Russell P. Kraft, Michael Chu, Peter F. Curran, Kuan Zhou, Bryan S. Goda, John F. McDonald
    A 5-10GHz SiGe BiCMOS FPGA with new configurable logic block. [Citation Graph (0, 0)][DBLP]
    Microprocessors and Microsystems, 2005, v:29, n:2-3, pp:121-131 [Journal]
  14. Chao You, Jong-Ru Guo, Russell P. Kraft, Michael Chu, Bryan S. Goda, John F. McDonald
    A 12-Gb/s DEMUX Implemented With SiGe High-Speed FPGA Circuits. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 2007, v:15, n:9, pp:1051-1054 [Journal]

  15. Extracting Behavioral Models from WS-BPEL Processes for Service Discovery. [Citation Graph (, )][DBLP]


  16. Enabling on Demand Deployment of Middleware Services in Componentized Middleware. [Citation Graph (, )][DBLP]


  17. Towards a Well Structured and Dynamic Application Server. [Citation Graph (, )][DBLP]


  18. Towards Dynamic Component Updating: A Flexible and Lightweight Approach. [Citation Graph (, )][DBLP]


  19. A Cellular Automata ASIC for Conformal Computing. [Citation Graph (, )][DBLP]


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