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Jason Agron: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. David L. Andrews, Ron Sass, Erik Anderson, Jason Agron, Wesley Peck, Jim Stevens, Fabrice Baijot, Ed Komp
    The Case for High Level Programming Models for Reconfigurable Computers. [Citation Graph (0, 0)][DBLP]
    ERSA, 2006, pp:21-32 [Conf]
  2. Erik Anderson, Jason Agron, Wesley Peck, Jim Stevens, Fabrice Baijot, Ed Komp, Ron Sass, David L. Andrews
    Enabling a Uniform Programming Model Across the Software/Hardware Boundary. [Citation Graph (0, 0)][DBLP]
    FCCM, 2006, pp:89-98 [Conf]
  3. Jason Agron, Wesley Peck, Erik Anderson, David L. Andrews, Ed Komp, Ron Sass, Fabrice Baijot, Jim Stevens
    Run-Time Services for Hybrid CPU/FPGA Systems on Chip. [Citation Graph (0, 0)][DBLP]
    RTSS, 2006, pp:3-12 [Conf]
  4. Wesley Peck, Erik Anderson, Jason Agron, Jim Stevens, Fabrice Baijot, David L. Andrews
    Hthreads: A Computational Model for Reconfigurable Devices. [Citation Graph (0, 0)][DBLP]
    FPL, 2006, pp:1-4 [Conf]

  5. Building heterogeneous reconfigurable systems with a hardware microkernel. [Citation Graph (, )][DBLP]


  6. Domain-Specific Language for HW/SW Co-design for FPGAs. [Citation Graph (, )][DBLP]


  7. Model-Driven Engineering from Modular Monadic Semantics: Implementation Techniques Targeting Hardware and Software. [Citation Graph (, )][DBLP]


  8. Modeling Abstractions for Next Generation Reconfigurable Computing. [Citation Graph (, )][DBLP]


  9. Memory Hierarchy for MCSoPC Multithreaded Systems. [Citation Graph (, )][DBLP]


  10. Supporting High Level Language Semantics Within Hardware Resident Threads. [Citation Graph (, )][DBLP]


  11. Building heterogeneous reconfigurable systems using threads. [Citation Graph (, )][DBLP]


  12. Hardware Microkernels for Heterogeneous Manycore Systems. [Citation Graph (, )][DBLP]


  13. Symmetric Multiprocessor Design for Hybrid CPU/FPGA SoCs. [Citation Graph (, )][DBLP]


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