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Publications of Author

1. Chun Hok Ho, Ka Fai Cedric Yiu, Jiaquan Huo, Sven Nordholm, Wayne Luk
   Reconfigurable Acceleration of Robust Frequency-Domain Echo Cancellation. [Citation Graph (0, 0)][DBLP]
   ERSA, 2006, pp:184-190 [Conf]
   
2. Kuen Hung Tsoi, Chun Hok Ho, H. C. Yeung, Philip Heng Wai Leong
   An Arithmetic Library and Its Application to the N-body Problem. [Citation Graph (0, 0)][DBLP]
   FCCM, 2004, pp:68-78 [Conf]
   
3. Chun Hok Ho, Philip Heng Wai Leong, Wayne Luk, Steven J. E. Wilton, S. Lopez-Buedo
   Virtual Embedded Blocks: A Methodology for Evaluating Embedded Elements in FPGAs. [Citation Graph (0, 0)][DBLP]
   FCCM, 2006, pp:35-44 [Conf]
   
4. Steven J. E. Wilton, Chun Hok Ho, Philip Heng Wai Leong, Wayne Luk, Bradley R. Quinton
   A synthesizable datapath-oriented embedded FPGA fabric. [Citation Graph (0, 0)][DBLP]
   FPGA, 2007, pp:33-41 [Conf]
   
5. Chun Hok Ho, Philip Heng Wai Leong, Kuen Hung Tsoi, Ralf Ludewig, Peter Zipf, Alberto García Ortiz, Manfred Glesner
   Fly - A Modifiable Hardware Compiler. [Citation Graph (0, 0)][DBLP]
   FPL, 2002, pp:381-390 [Conf]
   
6. G. L. Zhang, Philip Heng Wai Leong, Chun Hok Ho, Kuen Hung Tsoi, C. C. C. Cheung, Dong-U Lee, Ray C. C. Cheung, Wayne Luk
   Reconfigurable Acceleration for Monte Carlo Based Financial Simulation. [Citation Graph (0, 0)][DBLP]
   FPT, 2005, pp:215-222 [Conf]
   
7. Chun Hok Ho, M. P. Leong, Philip Heng Wai Leong, Jürgen Becker, Manfred Glesner
   Rapid Prototyping of FPGA Based Floating Point DSP Systems. [Citation Graph (0, 0)][DBLP]
   IEEE International Workshop on Rapid System Prototyping, 2002, pp:19-24 [Conf]
   
8. 
   Reconfigurable acceleration of microphone array algorithms for speech enhancement. [Citation Graph (, )][DBLP]
   
   
9. 
   Domain-Specific Hybrid FPGA: Architecture and Floating Point Applications. [Citation Graph (, )][DBLP]
   
   
10. 
    Rapid estimation of power consumption for hybrid FPGAs. [Citation Graph (, )][DBLP]