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Frédéric Mallet: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Frédéric Mallet, Fernand Boéri, Jean-François Duboc
    SEP: Simulation framework to evaluate digital hardware architectures. [Citation Graph (0, 0)][DBLP]
    ESM, 2000, pp:355-359 [Conf]
  2. Frédéric Mallet, Fernand Boéri, Jean-François Duboc
    Hardware Modelling and Simulation Using an Object-Oriented Method. [Citation Graph (0, 0)][DBLP]
    ESM, 1998, pp:166-168 [Conf]
  3. Frédéric Mallet, Fernand Boéri
    Esterel and Java in an Object-Oriented Modelling and Simulation Framework for Heterogeneous Software and Hardware Systems The SEP Approach. [Citation Graph (0, 0)][DBLP]
    EUROMICRO, 1999, pp:1214-0 [Conf]
  4. Frédéric Mallet, Fernand Boéri, Jean-François Duboc
    Hardware Architecture Modelling Using an Object-Oriented Method. [Citation Graph (0, 0)][DBLP]
    EUROMICRO, 1998, pp:10147-10153 [Conf]
  5. Frédéric Mallet, Daniel Gaffé, Fernand Boéri
    Concurrent Control Systems: From Grafcet to VHDL. [Citation Graph (0, 0)][DBLP]
    EUROMICRO, 2000, pp:1230-1234 [Conf]
  6. Sadaf Alam, Roland N. Ibbett, Frédéric Mallet
    Simulation of a computer architecture for quantum chromodynamics calculations. [Citation Graph (0, 0)][DBLP]
    ACM Crossroads, 2003, v:9, n:3, pp:16-23 [Journal]
  7. Charles André, Frédéric Mallet, Robert de Simone
    Modeling Time(s). [Citation Graph (0, 0)][DBLP]
    MoDELS, 2007, pp:559-573 [Conf]
  8. Charles André, Frédéric Mallet, Marie-Agnès Peraldi-Frati
    Multiform Time in UML for Real-time Embedded Applications. [Citation Graph (0, 0)][DBLP]
    RTCSA, 2007, pp:232-240 [Conf]

  9. Executing AADL Models with UML/MARTE. [Citation Graph (, )][DBLP]


  10. Dealing with AADL End-to-End Flow Latency with UML MARTE. [Citation Graph (, )][DBLP]


  11. Marte CCSL to Execute East-ADL Timing Requirements. [Citation Graph (, )][DBLP]


  12. On the Semantics of UML/MARTE Clock Constraints. [Citation Graph (, )][DBLP]


  13. Specification and verification of time requirements with CCSL and Esterel. [Citation Graph (, )][DBLP]


  14. A multiform time approach to real-time system modeling; Application to an automotive system. [Citation Graph (, )][DBLP]


  15. Event-Triggered vs. Time-Triggered Communications with UML MARTE. [Citation Graph (, )][DBLP]


  16. Modeling of immediate vs. delayed data communications: from AADL to UML Marte. [Citation Graph (, )][DBLP]


  17. An Automated Process for Implementing Multilevel Domain Models. [Citation Graph (, )][DBLP]


  18. MARTE: a profile for RT/E systems modeling, analysis--and simulation? [Citation Graph (, )][DBLP]


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