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Publications of Author

1. Santanu Dutta
   Design of Multimillion-Gate Multimedia SoCs: Where do we stand? [Citation Graph (0, 0)][DBLP]
   ESTImedia, 2005, pp:4- [Conf]
   
2. Andrew Wolfe, Jason Fritts, Santanu Dutta, Edil S. Tavares Fernandes
   Datapath Design for a VLIW Video Signal Processor. [Citation Graph (0, 0)][DBLP]
   HPCA, 1997, pp:24-0 [Conf]
   
3. Douglas R. Holberg, Santanu Dutta, Lawrence T. Pillage
   DC Parameterized Piecewise-Function Transistor Models for Bipolar and MOS Logic Stage Delay Evaluation. [Citation Graph (0, 0)][DBLP]
   ICCAD, 1990, pp:546-549 [Conf]
   
4. Santanu Dutta, Wayne Wolf
   Asymptotic Limits of Video Signal Processing Architectures. [Citation Graph (0, 0)][DBLP]
   ICCD, 1994, pp:622-625 [Conf]
   
5. Santanu Dutta, Wayne Wolf, Andrew Wolfe
   VLSI issues in memory-system design for video signal processors. [Citation Graph (0, 0)][DBLP]
   ICCD, 1995, pp:498-0 [Conf]
   
6. Kaushik Roy, Sudip Nag, Santanu Dutta
   Channel Architecture Optimization for Performance and Routability of Row-Based FPGAs. [Citation Graph (0, 0)][DBLP]
   ICCD, 1993, pp:220-223 [Conf]
   
7. Santanu Dutta, Sudip Nag, Kaushik Roy
   ASAP: A Transistor Sizing Tool for Speed Area and Power Optimization of Static CMOS Circuits. [Citation Graph (0, 0)][DBLP]
   ISCAS, 1994, pp:61-64 [Conf]
   
8. Santanu Dutta
   Architecture, Design, and Verification of an 18 Million Transistor Digital Television and Media Processor Chip. [Citation Graph (0, 0)][DBLP]
   PATMOS, 2000, pp:225-232 [Conf]
   
9. Santanu Dutta
   Architecture and Implementation of Multi-Processor SoCs for Advanced Set-Top Box and Digital TV Systems. [Citation Graph (0, 0)][DBLP]
   SBCCI, 2003, pp:145- [Conf]
   
10. Santanu Dutta, Deepak Singh, Essam Abu-Ghoush, Vijay Mehra
    Architecture and Implementation of a High-Definition Video Co-Processor for Digital Television Applications. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2000, pp:350-359 [Conf]
    
11. Santanu Dutta, Rune Jensen, Alf Rieckmann
    Viper: A Multiprocessor SOC for Advanced Set-Top Box and Digital TV Systems. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2001, v:18, n:5, pp:21-31 [Journal]
    
12. Balaji Raman, Samarjit Chakraborty, Wei Tsang Ooi, Santanu Dutta
    Reducing Data-Memory Footprint of Multimedia Applications by Delay Redistribution. [Citation Graph (0, 0)][DBLP]
    DAC, 2007, pp:738-743 [Conf]
    
13. 
    Recent Trends in the Design of Video Signal Processing IPS and Multimedia SoCs. [Citation Graph (, )][DBLP]