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Howard Sachs :
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Howard Sachs A New High Performance Embedded "Hard Core" Vector DSP Architecture for Multimedia Applications. [Citation Graph (0, 0)][DBLP ] ESTImedia, 2003, pp:2-4 [Conf ] Siamak Arya , Howard Sachs , Sreeram Duvvuru An architecture for high instruction level parallelism. [Citation Graph (0, 0)][DBLP ] HICSS (1), 1995, pp:153-162 [Conf ] Walter Hollingsworth , Howard Sachs , Alan Jay Smith The Clipper Processor: Instruction Set Architecture and Implementation. [Citation Graph (0, 0)][DBLP ] Commun. ACM, 1989, v:32, n:2, pp:200-219 [Journal ] Mark Birnbaum , Howard Sachs How VSIA Answers the SOC Dilemma. [Citation Graph (0, 0)][DBLP ] IEEE Computer, 1999, v:32, n:6, pp:42-50 [Journal ] John Kubiatowicz , Howard Sachs Guest Editors' Introduction: Hot Chips 18. [Citation Graph (0, 0)][DBLP ] IEEE Micro, 2007, v:27, n:2, pp:7-9 [Journal ] Search in 0.001secs, Finished in 0.001secs