|
Search the dblp DataBase
Doosan Cho:
[Publications]
[Author Rank by year]
[Co-authors]
[Prefers]
[Cites]
[Cited by]
Publications of Author
- Doosan Cho, Ravi Ayyagari, Gang-Ryung Uh, Yunheung Paek
Instruction Re-selection for Iterative Modulo Scheduling on High Performance Multi-issue DSPs. [Citation Graph (0, 0)][DBLP] EUC Workshops, 2006, pp:741-754 [Conf]
- Doosan Cho, Ilya Issenin, Nikil Dutt, Jonghee W. Yoon, Yunheung Paek
Software controlled memory layout reorganization for irregular array access patterns. [Citation Graph (0, 0)][DBLP] CASES, 2007, pp:179-188 [Conf]
- Doosan Cho, Ravi Ayyagari, Gang-Ryung Uh, Yunheung Paek
Preprocessing Strategy for Effective Modulo Scheduling on Multi-issue Digital Signal Processors. [Citation Graph (0, 0)][DBLP] CC, 2007, pp:16-31 [Conf]
Iterative Algorithm for Compound Instruction Selection with Register Coalescing. [Citation Graph (, )][DBLP]
Compiler driven data layout optimization for regular/irregular array access patterns. [Citation Graph (, )][DBLP]
Search in 0.001secs, Finished in 0.001secs
|