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Hiroaki Nishikawa: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Hiroshi Ishii, Hiroaki Nishikawa, Hiroki Tanaka
    Reliable TINA-based Telecommunication Networking Environment. [Citation Graph (0, 0)][DBLP]
    Euro-PDS, 1997, pp:17-22 [Conf]
  2. Hiroaki Nishikawa, Katsuhiko Asada, Hiroaki Terada
    A Decentralized controlled multi-processor system based on the data-driven scheme. [Citation Graph (0, 0)][DBLP]
    ICDCS, 1982, pp:639-644 [Conf]
  3. Hiroaki Nishikawa, Hiroaki Terada, Kohji Komatsu, Shin-ichi Yoshida, Toshiya Okamoto, Yoshiko Tsuji, Saki Takakura, Tsuyoshi Tokura, Yoichiro Nishikawwa, Shuji Hara, Mitsuo Meichi
    Architecture of a One-Chip Data Driven Processor: Q-p. [Citation Graph (0, 0)][DBLP]
    ICPP, 1987, pp:319-326 [Conf]
  4. Takjuji Urata, Hiroaki Nishikawa
    Emulation Facility for Data-Driven Real-Time Multi-processing. [Citation Graph (0, 0)][DBLP]
    ISHPC, 1999, pp:391-398 [Conf]
  5. Kazuhiro Aoki, Hiroshi Ishii, Souichi Miyata, Hiroaki Nishikawa
    Super-Integrated Data-Driven Processor for TINA-kTn Protocol Handling. [Citation Graph (0, 0)][DBLP]
    PDPTA, 1999, pp:998-1004 [Conf]
  6. Kazuhiro Aoki, Hiroaki Nishikawa
    Data-driven Implementation of Protocol Handling and Networking Interface for Networking Environment. [Citation Graph (0, 0)][DBLP]
    PDPTA, 2002, pp:1705-1711 [Conf]
  7. Kazuhiro Aoki, Hiroaki Nishikawa
    Data-Driven Implementation of Protocol/Media Processing for Networking Environment. [Citation Graph (0, 0)][DBLP]
    PDPTA, 2003, pp:882-888 [Conf]
  8. Shinya Ito, Ryosuke Kurebayashi, Hiroaki Nishikawa
    A Self-evolutionary Emulation Scheme for A Networking Oriented Data-driven Processor Architecture: CUE. [Citation Graph (0, 0)][DBLP]
    PDPTA, 2002, pp:1082-1088 [Conf]
  9. Shinya Ito, Shouhei Nomoto, Hiroshi Tomiyasu, Hiroaki Nishikawa
    The Microarchitecture of the CUE-v2 Processor: Enabling the Simultaneous Processing of Dataflow and Control-Flow Threads. [Citation Graph (0, 0)][DBLP]
    PDPTA, 2004, pp:525-531 [Conf]
  10. Hiroshi Ishii, Chee Onn Chow, Masahiro Yamamoto, Sakurako Horie, Hiroaki Nishikawa
    Responsive Event-Driven Safe and Secure Information Sharing Platform. [Citation Graph (0, 0)][DBLP]
    PDPTA, 2006, pp:327-333 [Conf]
  11. Hiroshi Ishii, Yoshitsugu Kondo, Hiroaki Nishikawa
    A Person-Oriented Ubiquitous and Secure Information Communication Environment Supported by Data-Driven Networking Processor. [Citation Graph (0, 0)][DBLP]
    PDPTA, 2005, pp:605-611 [Conf]
  12. Shin'ya Kudo, Kazuhiro Aoki, Hiroaki Nishikawa
    Super-Integrated Data-Driven Processor Architecture for Interoperable Networking Environment. [Citation Graph (0, 0)][DBLP]
    PDPTA, 2000, pp:- [Conf]
  13. Ryuichi Kudo, Yasuhiro Wabiko, Hiroaki Nishikawa
    Performance Verification Scheme for Data-Driven Real-time Processing. [Citation Graph (0, 0)][DBLP]
    PDPTA, 2000, pp:- [Conf]
  14. Ryosuke Kurebayashi, Toru Takahashi, Hiroaki Nishikawa
    A Data-driven Implementation of Real-time Video Compression. [Citation Graph (0, 0)][DBLP]
    PDPTA, 2002, pp:1271-1274 [Conf]
  15. Yoshimasa Sajima, Hiroshi Ishii, Hiroaki Nishikawa
    A Proposal of Internet Worm Detection Using ICMP. [Citation Graph (0, 0)][DBLP]
    PDPTA, 2006, pp:70-76 [Conf]
  16. Yasuhiro Wabiko, Kazuhiro Aoki, Hiroaki Nishikawa
    Data-Driven Realtime Biometrics Authentication for Secure Networking System. [Citation Graph (0, 0)][DBLP]
    PDPTA, 2004, pp:146-152 [Conf]
  17. Yasuhiro Wabiko, Hiroaki Nishikawa
    Performance Prediction/Verification Scheme for Data-driven Realtime Systems. [Citation Graph (0, 0)][DBLP]
    PDPTA, 2002, pp:290-298 [Conf]
  18. Yasuhiro Wabiko, Hiroaki Nishikawa
    An Interactive Tuning Support for Processor Allocation of Data-Driven Realtime Programs. [Citation Graph (0, 0)][DBLP]
    PDPTA, 2003, pp:1075-1081 [Conf]
  19. Masashi Ohtsuki, Yasuhiro Wabiko, Hiroaki Nishikawa
    Real-time Execution System for CUE series Data-Driven Processors; RESCUE. [Citation Graph (0, 0)][DBLP]
    PDPTA, 2000, pp:- [Conf]

  20. Autonomous Power-Supply Control for Ultra-Low-Power Self-Timed Pipeline. [Citation Graph (, )][DBLP]


  21. A proposal on Ad Hoc and Ubiquitous Communication Environment supported by Data-Driven Networking Processor. [Citation Graph (, )][DBLP]


  22. Concepts of Autonomous Contents Discovery Methods Based on Social Communities of Ad-Hoc Network Nodes Users. [Citation Graph (, )][DBLP]


  23. On Supporting Multipoint-to-point Video Transmission over Mobile Ad Hoc Networks. [Citation Graph (, )][DBLP]


  24. CUE-v3: Data-Driven Chip Multi-Processor for Ad hoc and Ubiquitous Networking Environment. [Citation Graph (, )][DBLP]


  25. Data-Driven Implementation of Protocol Handling for Supporting Ad Hoc and Ubiquitous Networking Environment. [Citation Graph (, )][DBLP]


  26. A Load Control Scheme on Data-Driven Networking Processor; CUE-v2. [Citation Graph (, )][DBLP]


  27. A Personal Agent that Supports Communication in the Ubiquitous Communication Environment. [Citation Graph (, )][DBLP]


  28. Self-Timed Stream Processor for Surrounding Computing Environment. [Citation Graph (, )][DBLP]


  29. Data-Driven Implementation of Wireless Mesh Protocol. [Citation Graph (, )][DBLP]


  30. Collaborative Research Project on Ultra-Low-Power Data-Driven Networking System. [Citation Graph (, )][DBLP]


  31. VLSI Design of Networking-Oriented Chip Multi-Processor; CUE-v3. [Citation Graph (, )][DBLP]


  32. Data-Driven Implementation of Contents Discovery Service on Ad Hoc Ubiquitous Network. [Citation Graph (, )][DBLP]


  33. Performance Study on Multipoint-to-Point Video Streaming over Mobile Ad Hoc Networks. [Citation Graph (, )][DBLP]


  34. Study on Power Efficiency of Data-Driven Wireless Mesh Protocol Processing. [Citation Graph (, )][DBLP]


  35. An Offloading Scheme for Ultra Low Power Data-Driven Networking System. [Citation Graph (, )][DBLP]


  36. Load-aware Effective Flooding over Ad Hoc Networks. [Citation Graph (, )][DBLP]


  37. Study on Data-Driven Power-Minimizing Scheme for a NGN Home Router. [Citation Graph (, )][DBLP]


  38. Self-Timed Power Gating for Ultra-Low-Power Pipeline Circuit. [Citation Graph (, )][DBLP]


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