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Publications of Author

1. Ryotaro Kobayashi, Yukihiro Ogawa, Hideki Ando, Toshio Shimada, Mitsuaki Iwata
   An On-Chip Multiprocessor Architecture with a Non-Blocking Synchronization Mechanism. [Citation Graph (0, 0)][DBLP]
   EUROMICRO, 1999, pp:1432-1440 [Conf]
   
2. Hideki Ando, Chikako Nakanishi, Hirohisa Machida, Tetsuya Hara, Satoru Kishida, Masao Nakaya
   Speculative Execution and Reducing Branch Penalty in a Parallel Issue Machine. [Citation Graph (0, 0)][DBLP]
   ICCD, 1993, pp:106-113 [Conf]
   
3. Hideki Ando, Chikako Nakanishi, Tetsuya Hara, Masao Nakaya
   Unconstrained Speculative Execution with Predicated State Buffering. [Citation Graph (0, 0)][DBLP]
   ISCA, 1995, pp:126-137 [Conf]
   
4. Tetsuya Hara, Hideki Ando, Chikako Nakanishi, Masao Nakaya
   Performance Comparison of ILP Machines with Cycle Time Evaluation. [Citation Graph (0, 0)][DBLP]
   ISCA, 1996, pp:213-224 [Conf]
   
5. Ryo Fujioka, Kiyokazu Katayama, Ryotaro Kobayashi, Hideki Ando, Toshio Shimada
   A preactivating mechanism for a VT-CMOS cache using address prediction. [Citation Graph (0, 0)][DBLP]
   ISLPED, 2002, pp:247-250 [Conf]
   
6. Hajime Shimada, Hideki Ando, Toshio Shimada
   Pipeline stage unification: a low-energy consumption technique for future mobile processors. [Citation Graph (0, 0)][DBLP]
   ISLPED, 2003, pp:326-329 [Conf]
   
7. Chikako Nakanishi, Hideki Ando, Tetsuya Hara, Masao Nakaya
   Software pipelining with path selection. [Citation Graph (0, 0)][DBLP]
   Systems and Computers in Japan, 1998, v:29, n:9, pp:74-86 [Journal]