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## Search the dblp DataBase
Svetlana N. Yanushkevich:
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## Publications of Author- Tadeusz Luba, Claudio Moraga, Svetlana N. Yanushkevich, Vlad P. Shmerko, Joanna Kolodziejczyk
**Application of Design Style in Evolutionary Multi-Level Networks Synthesis.**[Citation Graph (0, 0)][DBLP] EUROMICRO, 2000, pp:1156-1163 [Conf] - V. Cheushev, Vlad P. Shmerko, Dan A. Simovici, Svetlana N. Yanushkevich
**Functional Entropy and Decision Trees.**[Citation Graph (0, 0)][DBLP] ISMVL, 1998, pp:257-0 [Conf] - V. Cheushev, Svetlana N. Yanushkevich, Vlad P. Shmerko, Claudio Moraga, Joanna Kolodziejczyk
**Information Theory Method for Flexible Network Synthesis.**[Citation Graph (0, 0)][DBLP] ISMVL, 2001, pp:201-206 [Conf] - Tadeusz Luba, Claudio Moraga, Svetlana N. Yanushkevich, M. Opoka, Vlad P. Shmerko
**Evolutionary Multi-Level Network Synthesis in Given Design Style.**[Citation Graph (0, 0)][DBLP] ISMVL, 2000, pp:253-258 [Conf] - Vlad P. Shmerko, Svetlana N. Yanushkevich, Vitaly G. Levashenko
**Test Pattern Generation for Combinatorial Multi-Valued Networks Based on Generalized D-Algorithm.**[Citation Graph (0, 0)][DBLP] ISMVL, 1997, pp:139-144 [Conf] - Vlad P. Shmerko, Svetlana N. Yanushkevich, Vitaly G. Levashenko, I. Bondar
**Technique of Computing Logic Derivatives for MVL-Functions.**[Citation Graph (0, 0)][DBLP] ISMVL, 1996, pp:267-272 [Conf] - Anna M. Tomaszewska, Piotr Dziurzanski, Svetlana N. Yanushkevich, Vlad P. Shmerko
**Two-Stage Exact Detection of Symmetrics.**[Citation Graph (0, 0)][DBLP] ISMVL, 2001, pp:213-0 [Conf] - Anna M. Tomaszewska, Svetlana N. Yanushkevich, Vlad P. Shmerko
**The Word-Level Models for Efficient Computation of Multiple-Valued Functions. PART 2: LWL Based Model.**[Citation Graph (0, 0)][DBLP] ISMVL, 2002, pp:209-215 [Conf] - Svetlana N. Yanushkevich, Jon T. Butler, Gerhard W. Dueck, Vlad P. Shmerko
**Experiments on FPRM Expressions for Partially Symmetric Logic Functions.**[Citation Graph (0, 0)][DBLP] ISMVL, 2000, pp:141-146 [Conf] - Svetlana N. Yanushkevich, Piotr Dziurzanski, Vlad P. Shmerko
**The Word-Level Models for Efficient Computation of Multiple-Valued Functions. PART 1: LAR Based Model.**[Citation Graph (0, 0)][DBLP] ISMVL, 2002, pp:202-208 [Conf] - Svetlana N. Yanushkevich, Denis V. Popel, Vlad P. Shmerko, V. Cheushev, Radomir S. Stankovic
**Information Theoretic Approach to Minimization of Polynomial Expressions over GF(4).**[Citation Graph (0, 0)][DBLP] ISMVL, 2000, pp:265-0 [Conf] - Svetlana N. Yanushkevich, Vlad P. Shmerko, O. R. Boulanov
**Embedding and Assembling Techniques for Spatial Computing Structure Design using Decision Trees and Diagrams.**[Citation Graph (0, 0)][DBLP] ISMVL, 2006, pp:29- [Conf] - Svetlana N. Yanushkevich, Vlad P. Shmerko, L. Guy, D. C. Lu
**Three Dimensional Multiple Valued Circuits Design Based on Single-Electron Logic.**[Citation Graph (0, 0)][DBLP] ISMVL, 2004, pp:275-280 [Conf] - Svetlana N. Yanushkevich, Vlad P. Shmerko, V. D. Malyugin, Piotr Dziurzanski
**Linearity of World-Level Circuit Models: New Understanding.**[Citation Graph (0, 0)][DBLP] IWLS, 2002, pp:67-72 [Conf] - Vlad P. Shmerko, Svetlana N. Yanushkevich, K. Malecki
**A Class of Logic design Problems solved based on Parallel Computations of Butterfly Configurations.**[Citation Graph (0, 0)][DBLP] PDPTA, 1996, pp:1589-1592 [Conf] - Vlad P. Shmerko, Svetlana N. Yanushkevich
**Three-Dimensional Feedforward Neural Networks and Their Realization by Nano-Devices.**[Citation Graph (0, 0)][DBLP] Artif. Intell. Rev., 2003, v:20, n:3-4, pp:473-494 [Journal] - Svetlana N. Yanushkevich
**Editorial - Artificial Intelligence in Logic Design.**[Citation Graph (0, 0)][DBLP] Artif. Intell. Rev., 2003, v:20, n:3-4, pp:167-168 [Journal] - Jon T. Butler, Gerhard W. Dueck, Svetlana N. Yanushkevich, Vlad P. Shmerko
**On the number of generators for transeunt triangles.**[Citation Graph (0, 0)][DBLP] Discrete Applied Mathematics, 2001, v:108, n:3, pp:309-316 [Journal] - Svetlana N. Yanushkevich
**Matrix and combinatorics solutions of Boolean differential equations.**[Citation Graph (0, 0)][DBLP] Discrete Applied Mathematics, 2002, v:117, n:1-3, pp:279-292 [Journal] - Jon T. Butler, Gerhard W. Dueck, Vlad P. Shmerko, Svetlana N. Yanushkevich
**Comments on "Sympathy: fast exact minimization of fixedpolarity Reed-Muller expansion for symmetric functions".**[Citation Graph (0, 0)][DBLP] IEEE Trans. on CAD of Integrated Circuits and Systems, 2000, v:19, n:11, pp:1386-1388 [Journal] - P. S. P. Wang, Svetlana N. Yanushkevich
**Biometric technologies and applications.**[Citation Graph (0, 0)][DBLP] Artificial Intelligence and Applications, 2007, pp:249-254 [Conf] **Synthetic Biometrics: A Survey.**[Citation Graph (, )][DBLP]**A concept of intelligent biometric-based early detection and warning system.**[Citation Graph (, )][DBLP]**Support of Interviewing Techniques in Physical Access Control Systems.**[Citation Graph (, )][DBLP]**Accelerating Decision Making Support in Biometric Assistant for Remote Temperature Measures.**[Citation Graph (, )][DBLP]**Biometric-Based Decision Support Assistance in Physical Access Control Systems.**[Citation Graph (, )][DBLP]**Fundamentals of Biometric System Design: New Course for Electrical, Computer, and Software Engineering Students.**[Citation Graph (, )][DBLP]
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