The SCEAS System
Navigation Menu

Search the dblp DataBase

Title:
Author:

Igor Lemberski: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Igor Lemberski
    Modified Approach to Automata State Encoding for LUT FPGA Implementation. [Citation Graph (0, 0)][DBLP]
    EUROMICRO, 1998, pp:10196-10199 [Conf]
  2. Igor Lemberski, M. Ratniece
    XILINX4000 Architecture-Driven Synthesis for Speed. [Citation Graph (0, 0)][DBLP]
    FPL, 1998, pp:476-480 [Conf]
  3. Igor Lemberski
    Methodology of Logic Synthesis for Implementation Using Heterogeneous LUT FPGAs. [Citation Graph (0, 0)][DBLP]
    Great Lakes Symposium on VLSI, 1999, pp:242-243 [Conf]
  4. Igor Lemberski, Mark B. Josephs
    Optimal Two-Level Delay - Insensitive Implementation of Logic Functions. [Citation Graph (0, 0)][DBLP]
    PATMOS, 2002, pp:92-100 [Conf]

  5. Asynchronous two-level logic of reduced cost. [Citation Graph (, )][DBLP]


  6. Avoiding Hazards for Speed-Independent Logic Design. [Citation Graph (, )][DBLP]


  7. Cost Effective Implementation of Asynchronous Two-Level Logic. [Citation Graph (, )][DBLP]


Search in 0.001secs, Finished in 0.001secs
NOTICE1
System may not be available sometimes or not working properly, since it is still in development with continuous upgrades
NOTICE2
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP
 
System created by asidirop@csd.auth.gr [http://users.auth.gr/~asidirop/] © 2002
for Data Engineering Laboratory, Department of Informatics, Aristotle University © 2002