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Maged M. Michael :
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Maged M. Michael CAS-Based Lock-Free Algorithm for Shared Deques. [Citation Graph (0, 0)][DBLP ] Euro-Par, 2003, pp:651-660 [Conf ] Ashwini K. Nanda , Anthony-Trung Nguyen , Maged M. Michael , Douglas J. Joseph High-Throughput Coherence Controllers. [Citation Graph (0, 0)][DBLP ] HPCA, 2000, pp:145-155 [Conf ] Maged M. Michael , Ashwini K. Nanda Design and Performance of Directory Caches for Scalable Shared Memory Multiprocessors. [Citation Graph (0, 0)][DBLP ] HPCA, 1999, pp:142-151 [Conf ] Maged M. Michael , Michael L. Scott Implementation of Atomic Primitives on Distributed Shared Memory Multiprocessors. [Citation Graph (0, 0)][DBLP ] HPCA, 1995, pp:222-231 [Conf ] Anthony-Trung Nguyen , Maged M. Michael , Arun Sharma , Josep Torrellas The Augmint multiprocessor simulation toolkit for Intel x86 architectures. [Citation Graph (0, 0)][DBLP ] ICCD, 1996, pp:486-490 [Conf ] Maged M. Michael , Michael L. Scott Relative Performance of Preemption-Safe Locking and Non-Blocking Synchronization on Multiprogrammed Shared Memory Multiprocessors. [Citation Graph (0, 0)][DBLP ] IPPS, 1997, pp:267-273 [Conf ] Ashwini K. Nanda , Yiming Hu , Moriyoshi Ohara , Caroline Benveniste , Mark Giampapa , Maged M. Michael The Design of COMPASS: An Execution Driven Simulator for Commercial Applications Running on Shared Memory Multiprocessors. [Citation Graph (0, 0)][DBLP ] IPPS/SPDP, 1998, pp:503-509 [Conf ] Anthony-Trung Nguyen , Pradip Bose , Kattamuri Ekanadham , Ashwini K. Nanda , Maged M. Michael Accuracy and Speedup of Parallel Trace-Driven Architectural Simulation. [Citation Graph (0, 0)][DBLP ] IPPS, 1997, pp:39-44 [Conf ] Maged M. Michael , Ashwini K. Nanda , Beng-Hong Lim , Michael L. Scott Coherence Controller Architectures for SMP-Based CC-NUMA Multiprocessors. [Citation Graph (0, 0)][DBLP ] ISCA, 1997, pp:219-228 [Conf ] Maged M. Michael Scalable lock-free dynamic memory allocation. [Citation Graph (0, 0)][DBLP ] PLDI, 2004, pp:35-46 [Conf ] Maged M. Michael Safe memory reclamation for dynamic lock-free objects using atomic reads and writes. [Citation Graph (0, 0)][DBLP ] PODC, 2002, pp:21-30 [Conf ] Maged M. Michael Brief announcement: completing the lock-free dynamic cycle. [Citation Graph (0, 0)][DBLP ] PODC, 2004, pp:372- [Conf ] Maged M. Michael , Michael L. Scott Simple, Fast, and Practical Non-Blocking and Blocking Concurrent Queue Algorithms. [Citation Graph (0, 0)][DBLP ] PODC, 1996, pp:267-275 [Conf ] Vijay A. Saraswat , Radha Jagadeesan , Maged M. Michael , Christoph von Praun A theory of memory models. [Citation Graph (0, 0)][DBLP ] PPOPP, 2007, pp:161-172 [Conf ] Maged M. Michael High performance dynamic lock-free hash tables and list-based sets. [Citation Graph (0, 0)][DBLP ] SPAA, 2002, pp:73-82 [Conf ] Maged M. Michael Practical Lock-Free and Wait-Free LL/SC/VL Implementations Using 64-Bit CAS. [Citation Graph (0, 0)][DBLP ] DISC, 2004, pp:144-158 [Conf ] Ashwini K. Nanda , Anthony-Trung Nguyen , Maged M. Michael , Douglas J. Joseph High-throughout coherence control and hardware messaging in Everest. [Citation Graph (0, 0)][DBLP ] IBM Journal of Research and Development, 2001, v:45, n:2, pp:229-244 [Journal ] Galen C. Hunt , Maged M. Michael , Srinivasan Parthasarathy , Michael L. Scott An Efficient Algorithm for Concurrent Priority Queue Heaps. [Citation Graph (0, 0)][DBLP ] Inf. Process. Lett., 1996, v:60, n:3, pp:151-157 [Journal ] Maged M. Michael , Michael L. Scott Nonblocking Algorithms and Preemption-Safe Locking on Multiprogrammed Shared Memory Multiprocessors. [Citation Graph (0, 0)][DBLP ] J. Parallel Distrib. Comput., 1998, v:51, n:1, pp:1-26 [Journal ] Maged M. Michael , Ashwini K. Nanda , Beng-Hong Lim Coherence Controller Architectures for Scalable Shared-Memory Multiprocessors. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 1999, v:48, n:2, pp:245-255 [Journal ] Maged M. Michael Hazard Pointers: Safe Memory Reclamation for Lock-Free Objects. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Parallel Distrib. Syst., 2004, v:15, n:6, pp:491-504 [Journal ] Robert W. Wisniewski , Reza Azimi , Mathieu Desnoyers , Maged M. Michael , José E. Moreira , Doron Shiloach , Livio Soares Experiences Understanding Performance in a Commercial Scale-Out Environment. [Citation Graph (0, 0)][DBLP ] Euro-Par, 2007, pp:139-149 [Conf ] José E. Moreira , Maged M. Michael , Dilma Da Silva , Doron Shiloach , Parijat Dube , Li Zhang Scalability of the Nutch search engine. [Citation Graph (0, 0)][DBLP ] ICS, 2007, pp:3-12 [Conf ] Maged M. Michael , José E. Moreira , Doron Shiloach , Robert W. Wisniewski Scale-up x Scale-out: A Case Study using Nutch/Lucene. [Citation Graph (0, 0)][DBLP ] IPDPS, 2007, pp:1-8 [Conf ] Memory Management in Concurrent Algorithms. [Citation Graph (, )][DBLP ] Reducing Memory Ordering Overheads in Software Transactional Memory. [Citation Graph (, )][DBLP ] Implementing and Exploiting Inevitability in Software Transactional Memory. [Citation Graph (, )][DBLP ] Lock elision for read-only critical sections in Java. [Citation Graph (, )][DBLP ] Idempotent work stealing. [Citation Graph (, )][DBLP ] RingSTM: scalable transactions with a single atomic instruction. [Citation Graph (, )][DBLP ] A Case for Including Transactions in OpenMP. [Citation Graph (, )][DBLP ] Software transactional memory: why is it only a research toy? [Citation Graph (, )][DBLP ] Compiler and runtime techniques for software transactional memory optimization. [Citation Graph (, )][DBLP ] Search in 0.005secs, Finished in 0.007secs