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S. Balakrishnan: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. H. Sarojadevi, S. K. Nandy, S. Balakrishnan
    Enforcing Cache Coherence at Data Sharing Boundaries without Global Control: A Hardware-Software Approach (Research Note). [Citation Graph (0, 0)][DBLP]
    Euro-Par, 2002, pp:543-546 [Conf]
  2. Manvi Agarwal, S. K. Nandy, Jos T. J. van Eijndhoven, S. Balakrishnan
    Speculative Trace Scheduling in VLIW Processors. [Citation Graph (0, 0)][DBLP]
    ICCD, 2002, pp:408-413 [Conf]
  3. Manvi Agarwal, S. K. Nandy, Jos T. J. van Eijndhoven, S. Balakrishnan
    On the Benefits of Speculative Trace Scheduling in VLIW Processors. [Citation Graph (0, 0)][DBLP]
    PDPTA, 2002, pp:822-828 [Conf]
  4. S. Balakrishnan, Soumitra Kumar Nandy
    Arbitrary Precision Arithmetic - SIMD Style. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 1998, pp:128-132 [Conf]
  5. S. Balakrishnan, P. S. Kannan, C. Aravindan, P. Subathra
    On-line emission and economic load dispatch using adaptive Hopfield neural network. [Citation Graph (0, 0)][DBLP]
    Appl. Soft Comput., 2003, v:2, n:4, pp:297-305 [Journal]
  6. H. Sarojadevi, S. K. Nandy, S. Balakrishnan
    On the Correctness of Program Execution When Cache Coherence Is Maintained Locally at Data-Sharing Boundaries in Distributed Shared Memory Multiprocessors. [Citation Graph (0, 0)][DBLP]
    International Journal of Parallel Programming, 2004, v:32, n:5, pp:415-446 [Journal]

  7. Design of low cost universal artificial neuron controller for chopper fed embedded DC drives. [Citation Graph (, )][DBLP]


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