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Wang Yi: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Johan Bengtsson, Wang Yi
    Timed Automata: Semantics, Algorithms and Tools. [Citation Graph (0, 0)][DBLP]
    Lectures on Concurrency and Petri Nets, 2003, pp:87-124 [Conf]
  2. Bengt Jonsson, Wang Yi
    Fully Abstract Characterization of Probabilistic May Testing. [Citation Graph (0, 0)][DBLP]
    ARTS, 1999, pp:1-18 [Conf]
  3. Gerd Behrmann, Kim Guldstrand Larsen, Justin Pearson, Carsten Weise, Wang Yi
    Efficient Timed Reachability Analysis Using Clock Difference Diagrams. [Citation Graph (0, 0)][DBLP]
    CAV, 1999, pp:341-353 [Conf]
  4. Johan Bengtsson, W. O. David Griffioen, Kåre J. Kristoffersen, Kim Guldstrand Larsen, Fredrik Larsson, Paul Pettersson, Wang Yi
    Verification of an Audio Protocol with Bus Collision Using UPPAAL. [Citation Graph (0, 0)][DBLP]
    CAV, 1996, pp:244-256 [Conf]
  5. Uno Holmer, Kim Guldstrand Larsen, Wang Yi
    Deciding Properties of Regular Real Time Processes. [Citation Graph (0, 0)][DBLP]
    CAV, 1991, pp:443-453 [Conf]
  6. Pavel Krcál, Wang Yi
    Communicating Timed Automata: The More Synchronous, the More Difficult to Verify. [Citation Graph (0, 0)][DBLP]
    CAV, 2006, pp:249-262 [Conf]
  7. Kim Guldstrand Larsen, Paul Pettersson, Wang Yi
    UPPAAL: Status & Developments. [Citation Graph (0, 0)][DBLP]
    CAV, 1997, pp:456-459 [Conf]
  8. Johan Bengtsson, Bengt Jonsson, Johan Lilius, Wang Yi
    Partial Order Reductions for Timed Systems. [Citation Graph (0, 0)][DBLP]
    CONCUR, 1998, pp:485-500 [Conf]
  9. Pavel Krcál, Leonid Mokrushin, P. S. Thiagarajan, Wang Yi
    Timed vs. Time-Triggered Automata. [Citation Graph (0, 0)][DBLP]
    CONCUR, 2004, pp:340-354 [Conf]
  10. Wang Yi
    Real-Time Behaviour of Asynchronous Agents. [Citation Graph (0, 0)][DBLP]
    CONCUR, 1990, pp:502-520 [Conf]
  11. Wang Yi
    Specifying Processes in Terms of Their Environments. [Citation Graph (0, 0)][DBLP]
    Specification and Verification of Concurrent Systems, 1988, pp:276-293 [Conf]
  12. Alexandre David, M. Oliver Möller, Wang Yi
    Formal Verification of UML Statecharts with Real-Time Extensions. [Citation Graph (0, 0)][DBLP]
    FASE, 2002, pp:218-232 [Conf]
  13. Kim Guldstrand Larsen, Paul Pettersson, Wang Yi
    Model-Checking for Real-Time Systems. [Citation Graph (0, 0)][DBLP]
    FCT, 1995, pp:62-88 [Conf]
  14. Tobias Amnell, Elena Fersman, Leonid Mokrushin, Paul Pettersson, Wang Yi
    TIMES: A Tool for Schedulability Analysis and Code Generation of Real-Time Systems. [Citation Graph (0, 0)][DBLP]
    FORMATS, 2003, pp:60-72 [Conf]
  15. Wang Yi, Paul Pettersson, Mats Daniels
    Automatic verification of real-time communicating systems by constraint-solving. [Citation Graph (0, 0)][DBLP]
    FORTE, 1994, pp:243-258 [Conf]
  16. Huimin Lin, Wang Yi
    A Proof System for Timed Automata. [Citation Graph (0, 0)][DBLP]
    FoSSaCS, 2000, pp:208-222 [Conf]
  17. Wang Yi, Bengt Jonsson
    Decidability of Timed Language-Inclusion for Networks of Real-Time Communicating Sequential Processes. [Citation Graph (0, 0)][DBLP]
    FSTTCS, 1994, pp:243-255 [Conf]
  18. Huimin Lin, Wang Yi
    A Complete Axiomatisation for Timed Automata. [Citation Graph (0, 0)][DBLP]
    FSTTCS, 2000, pp:277-289 [Conf]
  19. Gerd Behrmann, Johan Bengtsson, Alexandre David, Kim Guldstrand Larsen, Paul Pettersson, Wang Yi
    UPPAAL Implementation Secrets. [Citation Graph (0, 0)][DBLP]
    FTRTFT, 2002, pp:3-22 [Conf]
  20. Bengt Jonsson, Chris Ho-Stuart, Wang Yi
    Testing and Refinement for Nondeterministic and Probabilistic Processes. [Citation Graph (0, 0)][DBLP]
    FTRTFT, 1994, pp:418-430 [Conf]
  21. Wang Yi
    Algebraic Reasoning for Real-Time Probabilistic Processes with Uncertain Information. [Citation Graph (0, 0)][DBLP]
    FTRTFT, 1994, pp:680-693 [Conf]
  22. Johan Bengtsson, Kim Guldstrand Larsen, Fredrik Larsson, Paul Pettersson, Wang Yi
    UPPAAL - a Tool Suite for Automatic Verification of Real-Time Systems. [Citation Graph (0, 0)][DBLP]
    Hybrid Systems, 1995, pp:232-243 [Conf]
  23. Kim Guldstrand Larsen, Paul Pettersson, Wang Yi
    Diagnostic Model-Checking for Real-Time Systems. [Citation Graph (0, 0)][DBLP]
    Hybrid Systems, 1995, pp:575-586 [Conf]
  24. Wang Yi
    CCS + Time = An Interleaving Model for Real Time Systems. [Citation Graph (0, 0)][DBLP]
    ICALP, 1991, pp:217-228 [Conf]
  25. Jin Song Dong, Ping Hao, Shengchao Qin, Jun Sun, Wang Yi
    Timed Patterns: TCOZ to Timed Automata. [Citation Graph (0, 0)][DBLP]
    ICFEM, 2004, pp:483-498 [Conf]
  26. Johan Bengtsson, Wang Yi
    On Clock Difference Constraints and Termination in Reachability Analysis of Timed Automata. [Citation Graph (0, 0)][DBLP]
    ICFEM, 2003, pp:491-503 [Conf]
  27. Geguang Pu, Dang Van Hung, Jifeng He, Wang Yi
    An Optimal Approach to Hardware/Software Partitioning for Synchronous Model. [Citation Graph (0, 0)][DBLP]
    IFM, 2004, pp:363-381 [Conf]
  28. Tobias Amnell, Alexandre David, Wang Yi
    A Real-Time Animator for Hybrid Systems. [Citation Graph (0, 0)][DBLP]
    LCTES, 2000, pp:134-145 [Conf]
  29. Bengt Jonsson, Wang Yi
    Compositional Testing Preorders for Probabilistic Processes [Citation Graph (0, 0)][DBLP]
    LICS, 1995, pp:431-441 [Conf]
  30. Kim Guldstrand Larsen, Wang Yi
    Time Abstracted Bisimiulation: Implicit Specifications and Decidability. [Citation Graph (0, 0)][DBLP]
    MFPS, 1993, pp:160-176 [Conf]
  31. Tobias Amnell, Gerd Behrmann, Johan Bengtsson, Pedro R. D'Argenio, Alexandre David, Ansgar Fehnker, Thomas Hune, Bertrand Jeannet, Kim Guldstrand Larsen, M. Oliver Möller, Paul Pettersson, Carsten Weise, Wang Yi
    UPPAAL - Now, Next, and Future. [Citation Graph (0, 0)][DBLP]
    MOVEP, 2000, pp:99-124 [Conf]
  32. Wang Yi, Kim Guldstrand Larsen
    Testing Probabilistic and Nondeterministic Processes. [Citation Graph (0, 0)][DBLP]
    PSTV, 1992, pp:47-61 [Conf]
  33. Gerd Behrmann, Alexandre David, Kim Guldstrand Larsen, John Håkansson, Paul Pettersson, Wang Yi, Martijn Hendriks
    UPPAAL 4.0. [Citation Graph (0, 0)][DBLP]
    QEST, 2006, pp:125-126 [Conf]
  34. Christer Norström, Anders Wall, Wang Yi
    Timed Automata as Task Models for Event-Driven Systems. [Citation Graph (0, 0)][DBLP]
    RTCSA, 1999, pp:182-189 [Conf]
  35. Anders Wall, Kristian Sandström, Jukka Mäki-Turja, Christer Norström, Wang Yi
    Verifying temporal constraints on data in multi-rate transactions using timed automata. [Citation Graph (0, 0)][DBLP]
    RTCSA, 2000, pp:263-270 [Conf]
  36. Kim Guldstrand Larsen, Fredrik Larsson, Paul Pettersson, Wang Yi
    Efficient verification of real-time systems: compact data structure and state-space reduction. [Citation Graph (0, 0)][DBLP]
    IEEE Real-Time Systems Symposium, 1997, pp:14-24 [Conf]
  37. Kim Guldstrand Larsen, Paul Pettersson, Wang Yi
    Compositional and Symbolic Model-Checking of Real-Time Systems. [Citation Graph (0, 0)][DBLP]
    IEEE Real-Time Systems Symposium, 1995, pp:76-89 [Conf]
  38. Geguang Pu, Xiangpeng Zhao, Shuling Wang, Zongyan Qiu, Jifeng He, Wang Yi
    An Approach to Hardware/Software Partitioning for Multiple Hardware Devices Model. [Citation Graph (0, 0)][DBLP]
    SEFM, 2004, pp:376-385 [Conf]
  39. Alexandre David, Gerd Behrmann, Kim Guldstrand Larsen, Wang Yi
    Unification & Sharing in Timed Automata Verification. [Citation Graph (0, 0)][DBLP]
    SPIN, 2003, pp:225-229 [Conf]
  40. Tobias Amnell, Elena Fersman, Leonid Mokrushin, Paul Pettersson, Wang Yi
    TIMES - A Tool for Modelling and Implementation of Embedded Systems. [Citation Graph (0, 0)][DBLP]
    TACAS, 2002, pp:460-464 [Conf]
  41. Johan Bengtsson, Kim Guldstrand Larsen, Fredrik Larsson, Paul Pettersson, Wang Yi
    UPPAAL in 1995. [Citation Graph (0, 0)][DBLP]
    TACAS, 1996, pp:431-434 [Conf]
  42. Elena Fersman, Leonid Mokrushin, Paul Pettersson, Wang Yi
    Schedulability Analysis Using Two Clocks. [Citation Graph (0, 0)][DBLP]
    TACAS, 2003, pp:224-239 [Conf]
  43. Elena Fersman, Paul Pettersson, Wang Yi
    Timed Automata with Asynchronous Processes: Schedulability and Decidability. [Citation Graph (0, 0)][DBLP]
    TACAS, 2002, pp:67-82 [Conf]
  44. Pavel Krcál, Wang Yi
    Decidable and Undecidable Problems in Schedulability Analysis Using Timed Automata. [Citation Graph (0, 0)][DBLP]
    TACAS, 2004, pp:236-250 [Conf]
  45. Fredrik Larsson, Paul Pettersson, Wang Yi
    On Memory-Block Traversal Problems in Model-Checking Timed-Systems. [Citation Graph (0, 0)][DBLP]
    TACAS, 2000, pp:127-141 [Conf]
  46. Magnus Lindahl, Paul Pettersson, Wang Yi
    Formal Design and Analysis of a Gear Controller. [Citation Graph (0, 0)][DBLP]
    TACAS, 1998, pp:281-297 [Conf]
  47. Kåre J. Kristoffersen, François Laroussinie, Kim Guldstrand Larsen, Paul Pettersson, Wang Yi
    A Compositional Proof of a Real-Time Mutual Exclusion Protocol. [Citation Graph (0, 0)][DBLP]
    TAPSOFT, 1997, pp:565-579 [Conf]
  48. Alexandre David, Gerd Behrmann, Kim Guldstrand Larsen, Wang Yi
    A Tool Architecture for the Next Generation of Uppaal. [Citation Graph (0, 0)][DBLP]
    10th Anniversary Colloquium of UNU/IIST, 2002, pp:352-366 [Conf]
  49. Huimin Lin, Wang Yi
    Axiomatising timed automata. [Citation Graph (0, 0)][DBLP]
    Acta Inf., 2002, v:38, n:4, pp:277-305 [Journal]
  50. Jifeng He, Dang Van Hung, Geguang Pu, Zongyan Qiu, Wang Yi
    Exploring optimal solution to hardware/software partitioning for synchronous model. [Citation Graph (0, 0)][DBLP]
    Formal Asp. Comput., 2005, v:17, n:4, pp:443-460 [Journal]
  51. Kim Guldstrand Larsen, Wang Yi
    Time-abstracted Bisimulation: Implicit Specifications and Decidability. [Citation Graph (0, 0)][DBLP]
    Inf. Comput., 1997, v:134, n:2, pp:75-101 [Journal]
  52. Johan Bengtsson, W. O. David Griffioen, Kåre J. Kristoffersen, Kim Guldstrand Larsen, Fredrik Larsson, Paul Pettersson, Wang Yi
    Automated verification of an audio-control protocol using UPPAAL. [Citation Graph (0, 0)][DBLP]
    J. Log. Algebr. Program., 2002, v:52, n:, pp:163-181 [Journal]
  53. Elena Fersman, Wang Yi
    A Generic Approach to Schedulability Analysis of Real-Time Tasks. [Citation Graph (0, 0)][DBLP]
    Nord. J. Comput., 2004, v:11, n:2, pp:129-147 [Journal]
  54. Tobias Amnell, Elena Fersman, Paul Pettersson, Hongyan Sun, Wang Yi
    Code Synthesis for Timed Automata. [Citation Graph (0, 0)][DBLP]
    Nord. J. Comput., 2002, v:9, n:4, pp:269-300 [Journal]
  55. Kim Guldstrand Larsen, Justin Pearson, Carsten Weise, Wang Yi
    Clock Difference Diagrams. [Citation Graph (0, 0)][DBLP]
    Nord. J. Comput., 1999, v:6, n:3, pp:271-298 [Journal]
  56. Paul Pettersson, Wang Yi
    Guest Editors' Foreword. [Citation Graph (0, 0)][DBLP]
    Nord. J. Comput., 2005, v:12, n:2, pp:67-0 [Journal]
  57. Kim Guldstrand Larsen, Fredrik Larsson, Paul Pettersson, Wang Yi
    Compact Data Structures and State-Space Reduction for Model-Checking Real-Time Systems. [Citation Graph (0, 0)][DBLP]
    Real-Time Systems, 2003, v:25, n:2-3, pp:255-275 [Journal]
  58. Gu Dawu, Wang Yi
    On the Techniques of Enhancing the Security of Block Ciphers. [Citation Graph (0, 0)][DBLP]
    Operating Systems Review, 2001, v:35, n:4, pp:94-96 [Journal]
  59. Kim Guldstrand Larsen, Paul Pettersson, Wang Yi
    UPPAAL in a Nutshell. [Citation Graph (0, 0)][DBLP]
    STTT, 1997, v:1, n:1-2, pp:134-152 [Journal]
  60. Magnus Lindahl, Paul Pettersson, Wang Yi
    Formal design and analysis of a gear controller. [Citation Graph (0, 0)][DBLP]
    STTT, 2001, v:3, n:3, pp:353-368 [Journal]
  61. Tiziana Margaria, Wang Yi
    Introductory paper: scalability aspects of validation. [Citation Graph (0, 0)][DBLP]
    STTT, 2003, v:5, n:1, pp:1-3 [Journal]
  62. Elena Fersman, Leonid Mokrushin, Paul Pettersson, Wang Yi
    Schedulability analysis of fixed-priority systems using timed automata. [Citation Graph (0, 0)][DBLP]
    Theor. Comput. Sci., 2006, v:354, n:2, pp:301-317 [Journal]
  63. Bengt Jonsson, Wang Yi
    Testing preorders for probabilistic processes can be characterized by simulations. [Citation Graph (0, 0)][DBLP]
    Theor. Comput. Sci., 2002, v:282, n:1, pp:33-51 [Journal]
  64. Paul Caspi, Alberto L. Sangiovanni-Vincentelli, Luís Almeida, Albert Benveniste, Bruno Bouyssounouse, Giorgio C. Buttazzo, Ivica Crnkovic, Werner Damm, Jakob Engblom, Gerhard Fohler, Marisol García-Valls, Hermann Kopetz, Yassine Lakhnech, François Laroussinie, Luciano Lavagno, Giuseppe Lipari, Florence Maraninchi, Philipp Peti, Juan Antonio de la Puente, Norman Scaife, Joseph Sifakis, Robert de Simone, Martin Törngren, Paulo Veríssimo, Andy J. Wellings, Reinhard Wilhelm, Tim A. C. Willemse, Wang Yi
    Guidelines for a graduate curriculum on embedded software and systems. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Embedded Comput. Syst., 2005, v:4, n:3, pp:587-611 [Journal]
  65. Pavel Krcál, Martin Stigge, Wang Yi
    Multi-processor Schedulability Analysis of Preemptive Real-Time Tasks with Variable Execution Times. [Citation Graph (0, 0)][DBLP]
    FORMATS, 2007, pp:274-289 [Conf]
  66. Parosh Aziz Abdulla, Pavel Krcál, Wang Yi
    Sampled Universality of Timed Automata. [Citation Graph (0, 0)][DBLP]
    FoSSaCS, 2007, pp:2-16 [Conf]
  67. Geguang Pu, Chong Zhang, Zongyan Qiu, Jifeng He, Wang Yi
    Integrating Timed Automata into Tabu Algorithm for HW-SW Partitioning. [Citation Graph (0, 0)][DBLP]
    ICECCS, 2006, pp:131-138 [Conf]
  68. Elena Fersman, Pavel Krcál, Paul Pettersson, Wang Yi
    Task automata: Schedulability, decidability and undecidability. [Citation Graph (0, 0)][DBLP]
    Inf. Comput., 2007, v:205, n:8, pp:1149-1172 [Journal]

  69. Improving scalability of model-checking for minimizing buffer requirements of synchronous dataflow graphs. [Citation Graph (, )][DBLP]


  70. R-Automata. [Citation Graph (, )][DBLP]


  71. Modelling and analysis of a commercial field bus protocol. [Citation Graph (, )][DBLP]


  72. Minimizing Multi-resource Energy for Real-Time Systems with Discrete Operation Modes. [Citation Graph (, )][DBLP]


  73. Model-based validation of QoS properties of biomedical sensor networks. [Citation Graph (, )][DBLP]


  74. Cyclic dependencies in modular performance analysis. [Citation Graph (, )][DBLP]


  75. Cache-aware scheduling and analysis for multicores. [Citation Graph (, )][DBLP]


  76. Modeling and Analysis of Thread-Pools in an Industrial Communication Platform. [Citation Graph (, )][DBLP]


  77. Fixed-Priority Multiprocessor Scheduling with Liu and Layland's Utilization Bound. [Citation Graph (, )][DBLP]


  78. New Response Time Bounds for Fixed Priority Multiprocessor Scheduling. [Citation Graph (, )][DBLP]


  79. New Schedulability Test Conditions for Non-preemptive Scheduling on Multiprocessor Platforms. [Citation Graph (, )][DBLP]


  80. WCET Analysis of the mC/OS-II Real-Time Kernel. [Citation Graph (, )][DBLP]


  81. Applying SLEUTH for Simulating and Assessing Urban Growth Scenarios on a Case Study of Beijing. [Citation Graph (, )][DBLP]


  82. Sampled Semantics of Timed Automata [Citation Graph (, )][DBLP]


  83. Universality of R-automata with Value Copying. [Citation Graph (, )][DBLP]


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