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Asen Asenov: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Asen Asenov, J. R. Barker, Andrew R. Brown, G. L. Lee
    Scalable Parallel 3D Finite Element Nonlinear Poisson Solver. [Citation Graph (0, 0)][DBLP]
    EUROSIM, 1994, pp:665-672 [Conf]
  2. J. R. Barker, Asen Asenov, Andrew R. Brown, J. Cluckie, S. Babiker, C. R. Arokianathan
    Parallel Simulation of Semiconductor Devices. [Citation Graph (0, 0)][DBLP]
    EUROSIM, 1994, pp:683-690 [Conf]
  3. S. Roy, Asen Asenov, J. R. Barker
    Optimum partitioning of topologically rectangular grids. [Citation Graph (0, 0)][DBLP]
    EUROSIM, 1996, pp:179-185 [Conf]
  4. Natalia Seoane, Antonio J. García-Loureiro, K. Kalna, A. Asenov
    A High-Performance Parallel Device Simulator for High Electron Mobility Transistors. [Citation Graph (0, 0)][DBLP]
    PARCO, 2005, pp:407-414 [Conf]
  5. Asen Asenov, D. Reid, J. R. Barker
    Speed-Up of Scalable Iterative Linear Solvers Implemented on an Array of Transputers. [Citation Graph (0, 0)][DBLP]
    Parallel Computing, 1995, v:21, n:4, pp:669-682 [Journal]
  6. Asen Asenov, D. Reid, J. R. Barker
    Speed-Up of Scalable Iterative Linear Solvers Implemented on an Array of Transputers. [Citation Graph (0, 0)][DBLP]
    Parallel Computing, 1994, v:20, n:3, pp:375-387 [Journal]
  7. Asen Asenov, J. R. Barker, Andrew R. Brown, G. L. Lee
    Scalable parallel 3D finite element nonlinear Poisson solver. [Citation Graph (0, 0)][DBLP]
    Simul. Pr. Theory, 1996, v:4, n:2-3, pp:155-168 [Journal]
  8. Asen Asenov, Andrew R. Brown, John H. Davies, Subhash Saini
    Hierarchical approach to "atomistic" 3-D MOSFET simulation. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1999, v:18, n:11, pp:1558-1565 [Journal]
  9. L. Yang, Asen Asenov, J. R. Watling, M. Boriçi, J. R. Barker, S. Roy, K. Elgaid, I. Thayne, T. Hackbarth
    Impact of device geometry and doping strategy on linearity and RF performance in Si/SiGe MODFETs. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2004, v:44, n:7, pp:1101-1107 [Journal]
  10. Asen Asenov
    Statistical Device Variability and its Impact on Yield and Performance. [Citation Graph (0, 0)][DBLP]
    IOLTS, 2007, pp:253- [Conf]

  11. Capturing intrinsic parameter fluctuations using the PSP compact model. [Citation Graph (, )][DBLP]


  12. Towards a Grid-Enabled Simulation Framework for Nano-CMOS Electronics. [Citation Graph (, )][DBLP]


  13. Integrating Security Solutions to Support nanoCMOS Electronics Research. [Citation Graph (, )][DBLP]


  14. Enabling Cutting-Edge Semiconductor Simulation through Grid Technology. [Citation Graph (, )][DBLP]


  15. Statistical-Variability Compact-Modeling Strategies for BSIM4 and PSP. [Citation Graph (, )][DBLP]


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