The SCEAS System
Navigation Menu

Search the dblp DataBase

Title:
Author:

Luciano Lavagno: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Felice Balarin, Luciano Lavagno, Claudio Passerone, Alberto L. Sangiovanni-Vincentelli, Marco Sgroi, Yosinori Watanabe
    Modeling and Designing Heterogeneous Systems. [Citation Graph (0, 0)][DBLP]
    Concurrency and Hardware Design, 2002, pp:228-273 [Conf]
  2. Alex Kondratyev, Jordi Cortadella, Michael Kishinevsky, Luciano Lavagno, Alexander Taubin, Alexandre Yakovlev
    Identifying State Coding Conflicts in Asynchronous System Specifications Using Petri Net Unfoldings. [Citation Graph (0, 0)][DBLP]
    ACSD, 1998, pp:152-0 [Conf]
  3. Luciano Lavagno
    System-Level Design Models and Implementation Techniques. [Citation Graph (0, 0)][DBLP]
    ACSD, 1998, pp:24-0 [Conf]
  4. Jordi Cortadella, Alex Kondratyev, Luciano Lavagno, Yosinori Watanabe
    Quasi-Static Scheduling for Concurrent Architectures. [Citation Graph (0, 0)][DBLP]
    ACSD, 2003, pp:29-40 [Conf]
  5. Jordi Cortadella, Michael Kishinevsky, Alex Kondratyev, Luciano Lavagno, Alexandre Yakovlev
    Hardware and Petri Nets: Application to Asynchronous Circuit Design. [Citation Graph (0, 0)][DBLP]
    ICATPN, 2000, pp:1-15 [Conf]
  6. Jordi Cortadella, Alex Kondratyev, Luciano Lavagno, Claudio Passerone, Yosinori Watanabe
    Quasi-Static Scheduling of Independent Tasksfor Reactive Systems. [Citation Graph (0, 0)][DBLP]
    ICATPN, 2002, pp:80-100 [Conf]
  7. Michael Kishinevsky, Jordi Cortadella, Alex Kondratyev, Luciano Lavagno, Alexander Taubin, Alexandre Yakovlev
    Coupling Asynchrony and Interrupts: Place Chart Nets. [Citation Graph (0, 0)][DBLP]
    ICATPN, 1997, pp:328-347 [Conf]
  8. Marco Sgroi, Luciano Lavagno, Yosinori Watanabe, Alberto L. Sangiovanni-Vincentelli
    Quasi-Static Scheduling of Embedded Software Using Equal Conflict Nets. [Citation Graph (0, 0)][DBLP]
    ICATPN, 1999, pp:208-227 [Conf]
  9. Alexandre Yakovlev, Michael Kishinevsky, Alex Kondratyev, Luciano Lavagno
    OR Causality: Modelling and Hardware Implementation. [Citation Graph (0, 0)][DBLP]
    Application and Theory of Petri Nets, 1994, pp:568-587 [Conf]
  10. Marcello Lajolo, Luciano Lavagno, Alberto L. Sangiovanni-Vincentelli
    Fast Instruction Cache Simulation Strategies in a Hardware/Software Co-Design Environment. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 1999, pp:347-0 [Conf]
  11. Luciano Lavagno, Sujit Dey, Rajesh Gupta
    Specification, Modeling and Design Tools for System-on-Chip. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 2002, pp:21-23 [Conf]
  12. Ivan Blunno, Jordi Cortadella, Alex Kondratyev, Luciano Lavagno, Kelvin Lwin, Christos P. Sotiriou
    Handshake Protocols for De-Synchronization. [Citation Graph (0, 0)][DBLP]
    ASYNC, 2004, pp:149-158 [Conf]
  13. Ivan Blunno, Luciano Lavagno
    Automated Synthesis of Micro-Pipelines from Behavioral Verilog HDL. [Citation Graph (0, 0)][DBLP]
    ASYNC, 2000, pp:84-92 [Conf]
  14. Alex Kondratyev, Michael Kishinevsky, Jordi Cortadella, Luciano Lavagno, Alexandre Yakovlev
    Technology Mapping for Speed-Independent Circuits: Decomposition and Resynthesis. [Citation Graph (0, 0)][DBLP]
    ASYNC, 1997, pp:240-253 [Conf]
  15. Alexander Taubin, Alex Kondratyev, Jordi Cortadella, Luciano Lavagno
    Behavioral Transformations to Increase Noise Immunity in Asynchronous Specifications. [Citation Graph (0, 0)][DBLP]
    ASYNC, 1999, pp:36-0 [Conf]
  16. L. Necchi, Luciano Lavagno, Davide Pandini, Laura Vanzago
    An ultra-low energy asynchronous processor for Wireless Sensor Networks. [Citation Graph (0, 0)][DBLP]
    ASYNC, 2006, pp:78-85 [Conf]
  17. Alexei L. Semenov, Alexandre Yakovlev, Enric Pastor, Marco A. Peña, Jordi Cortadella, Luciano Lavagno
    Partial order based approach to synthesis of speed-independent circuits. [Citation Graph (0, 0)][DBLP]
    ASYNC, 1997, pp:254-0 [Conf]
  18. Alberto La Rosa, Luciano Lavagno, Claudio Passerone
    A software development tool chain for a reconfigurable processor. [Citation Graph (0, 0)][DBLP]
    CASES, 2001, pp:93-98 [Conf]
  19. Felice Balarin, Massimiliano Chiodo, Attila Jurecska, Luciano Lavagno, Bassam Tabbara, Alberto L. Sangiovanni-Vincentelli
    Automatic Generation of a Real-Time Operating System for Embedded Systems. [Citation Graph (0, 0)][DBLP]
    CODES, 1997, pp:95-100 [Conf]
  20. Felice Balarin, Luciano Lavagno, Claudio Passerone, Alberto L. Sangiovanni-Vincentelli, Yosinori Watanabe, Guang Yang
    Concurrent execution semantics and sequential simulation algorithms for the metropolis meta-model. [Citation Graph (0, 0)][DBLP]
    CODES, 2002, pp:13-18 [Conf]
  21. Jwahar R. Bammi, Wido Kruijtzer, Luciano Lavagno, Edwin A. Harcourt, Mihai T. Lazarescu
    Software performance estimation strategies in a system-level design tool. [Citation Graph (0, 0)][DBLP]
    CODES, 2000, pp:82-86 [Conf]
  22. André Chátelain, Yves Mathys, Giovanni Placido, Alberto La Rosa, Luciano Lavagno
    High-level architectural co-simulation using Esterel and C. [Citation Graph (0, 0)][DBLP]
    CODES, 2001, pp:189-194 [Conf]
  23. Grant Martin, Luciano Lavagno, Jean Louis-Guerin
    Embedded UML: a merger of real-time UML and co-design. [Citation Graph (0, 0)][DBLP]
    CODES, 2001, pp:23-28 [Conf]
  24. Marcello Lajolo, Luciano Lavagno, Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante
    Automatic test bench generation for simulation-based validation. [Citation Graph (0, 0)][DBLP]
    CODES, 2000, pp:136-140 [Conf]
  25. Marcello Lajolo, Anand Raghunathan, Sujit Dey, Luciano Lavagno, Alberto L. Sangiovanni-Vincentelli
    A case study on modeling shared memory access effects during performance analysis of HW/SW systems. [Citation Graph (0, 0)][DBLP]
    CODES, 1998, pp:117-121 [Conf]
  26. Luciano Lavagno, Massimiliano Chiodo, Paolo Giusto, Attila Jurecska, Harry Hsieh, S. Yee, Alberto L. Sangiovanni-Vincentelli, Kei Suzuki
    A case study in computer-aided codesign of embedded controllers. [Citation Graph (0, 0)][DBLP]
    CODES, 1994, pp:220-224 [Conf]
  27. Alberto L. Sangiovanni-Vincentelli, Marco Sgroi, Luciano Lavagno
    Formal Models for Communication-Based Design. [Citation Graph (0, 0)][DBLP]
    CONCUR, 2000, pp:29-47 [Conf]
  28. Felice Balarin, Harry Hsieh, Attila Jurecska, Luciano Lavagno, Alberto L. Sangiovanni-Vincentelli
    Formal Verification of Embedded Systems based on CFSM Networks. [Citation Graph (0, 0)][DBLP]
    DAC, 1996, pp:568-571 [Conf]
  29. Gianpiero Cabodi, Paolo Camurati, Luciano Lavagno, Stefano Quer
    Disjunctive Partitioning and Partial Iterative Squaring: An Effective Approach for Symbolic Traversal of Large Circuits. [Citation Graph (0, 0)][DBLP]
    DAC, 1997, pp:728-733 [Conf]
  30. Massimiliano Chiodo, Paolo Giusto, Attila Jurecska, Luciano Lavagno, Harry Hsieh, Kei Suzuki, Alberto L. Sangiovanni-Vincentelli, Ellen Sentovich
    Synthesis of Software Programs for Embedded Control Applications. [Citation Graph (0, 0)][DBLP]
    DAC, 1995, pp:587-592 [Conf]
  31. Jordi Cortadella, Michael Kishinevsky, Alex Kondratyev, Luciano Lavagno, Alexandre Yakovlev
    Methodology and Tools for State Encoding in Asynchronous Circuit Synthesis. [Citation Graph (0, 0)][DBLP]
    DAC, 1996, pp:63-66 [Conf]
  32. Jordi Cortadella, Alex Kondratyev, Luciano Lavagno, Marc Massot, Sandra Moral, Claudio Passerone, Yosinori Watanabe, Alberto L. Sangiovanni-Vincentelli
    Task generation and compile-time scheduling for mixed data-control embedded software. [Citation Graph (0, 0)][DBLP]
    DAC, 2000, pp:489-494 [Conf]
  33. Tullio Cuatto, Claudio Passerone, Luciano Lavagno, Attila Jurecska, Antonino Damiano, Claudio Sansoè, Alberto L. Sangiovanni-Vincentelli
    A Case Study in Embedded System Design: An Engine Control Unit. [Citation Graph (0, 0)][DBLP]
    DAC, 1998, pp:804-807 [Conf]
  34. Youpyo Hong, Peter A. Beerel, Luciano Lavagno, Ellen Sentovich
    Don't Care-Based BDD Minimization for Embedded Software. [Citation Graph (0, 0)][DBLP]
    DAC, 1998, pp:506-509 [Conf]
  35. Harry Hsieh, Felice Balarin, Luciano Lavagno, Alberto L. Sangiovanni-Vincentelli
    Efficient methods for embedded system design space exploration. [Citation Graph (0, 0)][DBLP]
    DAC, 2000, pp:607-612 [Conf]
  36. Alex Kondratyev, Jordi Cortadella, Michael Kishinevsky, Luciano Lavagno, Alexandre Yakovlev
    Automatic Synthesis and Optimization of Partially Specified Asynchronous Systems. [Citation Graph (0, 0)][DBLP]
    DAC, 1999, pp:110-115 [Conf]
  37. Luciano Lavagno, Kurt Keutzer, Alberto L. Sangiovanni-Vincentelli
    Algorithms for Synthesis of Hazard-Free Asynchronous Circuits. [Citation Graph (0, 0)][DBLP]
    DAC, 1991, pp:302-308 [Conf]
  38. Luciano Lavagno, Cho W. Moon, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli
    Solving the State Assignment Problem for Signal Transition Graphs. [Citation Graph (0, 0)][DBLP]
    DAC, 1992, pp:568-572 [Conf]
  39. Luciano Lavagno, Patrick C. McGeer, Alexander Saldanha, Alberto L. Sangiovanni-Vincentelli
    Timed Shannon Circuits: A Power-Efficient Design Style and Synthesis Tool. [Citation Graph (0, 0)][DBLP]
    DAC, 1995, pp:254-260 [Conf]
  40. Luciano Lavagno, Ellen Sentovich
    ECL: A Specification Environment for System-Level Design. [Citation Graph (0, 0)][DBLP]
    DAC, 1999, pp:511-516 [Conf]
  41. Claudio Passerone, Luciano Lavagno, Massimiliano Chiodo, Alberto L. Sangiovanni-Vincentelli
    Fast Hardware/Software Co-Simulation for Virtual Prototyping and Trade-Off Analysis. [Citation Graph (0, 0)][DBLP]
    DAC, 1997, pp:389-394 [Conf]
  42. Leonardo Maria Reyneri, F. Cucinotta, A. Serra, Luciano Lavagno
    A Hardware/Software Co-design Flow and IP Library Based of SimulinkTM. [Citation Graph (0, 0)][DBLP]
    DAC, 2001, pp:593-598 [Conf]
  43. Marco Sgroi, Luciano Lavagno
    Synthesis of Embedded Software Using Free-Choice Petri Nets. [Citation Graph (0, 0)][DBLP]
    DAC, 1999, pp:805-810 [Conf]
  44. G. Arrigoni, L. Duchini, Claudio Passerone, Luciano Lavagno, Yosinori Watanabe
    False Path Elimination in Quasi-Static Scheduling. [Citation Graph (0, 0)][DBLP]
    DATE, 2002, pp:964-970 [Conf]
  45. Jean-Yves Brunel, Marco Di Natale, Alberto Ferrari, Paolo Giusto, Luciano Lavagno
    SoftContract: an Assertion-Based Software Development Process that Enables Design-by-Contract. [Citation Graph (0, 0)][DBLP]
    DATE, 2004, pp:358-363 [Conf]
  46. Jordi Cortadella, Alex Kondratyev, Luciano Lavagno, Kelvin Lwin, Christos P. Sotiriou
    From Synchronous to Asynchronous: An Automatic Approach. [Citation Graph (0, 0)][DBLP]
    DATE, 2004, pp:1368-1369 [Conf]
  47. Chunghee Kim, Luciano Lavagno, Alberto L. Sangiovanni-Vincentelli
    Free MDD-Based Software Optimization Techniques for Embedded Systems. [Citation Graph (0, 0)][DBLP]
    DATE, 2000, pp:14-0 [Conf]
  48. Marcello Lajolo, Anand Raghunathan, Sujit Dey, Luciano Lavagno
    Efficient Power Co-Estimation Techniques for System-on-Chip Design. [Citation Graph (0, 0)][DBLP]
    DATE, 2000, pp:27-34 [Conf]
  49. Marcello Lajolo, Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante, Luciano Lavagno
    Evaluating System Dependability in a Co-Design Framework. [Citation Graph (0, 0)][DBLP]
    DATE, 2000, pp:586-590 [Conf]
  50. Luciano Lavagno, Claudio Passerone, Vishal Shah, Yosinori Watanabe
    A Time Slice Based Scheduler Model for System Level Design. [Citation Graph (0, 0)][DBLP]
    DATE, 2005, pp:378-383 [Conf]
  51. Claudio Passerone, Yosinori Watanabe, Luciano Lavagno
    Generation of minimal size code for scheduling graphs. [Citation Graph (0, 0)][DBLP]
    DATE, 2001, pp:668-673 [Conf]
  52. Alberto La Rosa, Luciano Lavagno, Claudio Passerone
    Hardware/Software Design Space Exploration for a Reconfigurable Processor. [Citation Graph (0, 0)][DBLP]
    DATE, 2003, pp:10570-10575 [Conf]
  53. Alberto La Rosa, Claudio Passerone, Francesco Gregoretti, Luciano Lavagno
    Implementation of a UMTS Turbo-Decoder on a Dynamically Reconfigurable Platform. [Citation Graph (0, 0)][DBLP]
    DATE, 2004, pp:1218-1223 [Conf]
  54. Bassam Tabbara, Marco Sgroi, Alberto L. Sangiovanni-Vincentelli, Enrica Filippi, Luciano Lavagno
    Fast Hardware-Software Co-simulation Using VHDL Models. [Citation Graph (0, 0)][DBLP]
    DATE, 1999, pp:309-0 [Conf]
  55. Laura Vanzago, Bishnupriya Bhattacharya, Joel Cambonie, Luciano Lavagno
    Design Space Exploration for a Wireless Protocol on a Reconfigurable Platform. [Citation Graph (0, 0)][DBLP]
    DATE, 2003, pp:10662-10667 [Conf]
  56. Felice Balarin, Luciano Lavagno, Claudio Passerone, Yosinori Watanabe
    Processes, Interfaces and Platforms. Embedded Software Modeling in Metropolis. [Citation Graph (0, 0)][DBLP]
    EMSOFT, 2002, pp:407-416 [Conf]
  57. Luciano Lavagno, Begoña Pino, Leonardo Maria Reyneri, A. Serra
    A Simulink(c)-Based Approach to System Level Design and Architecture Selection. [Citation Graph (0, 0)][DBLP]
    EUROMICRO, 2000, pp:1076-1083 [Conf]
  58. Alok Agrawal, Alexander Saldanha, Luciano Lavagno, Alberto L. Sangiovanni-Vincentelli
    Compact and complete test set generation for multiple stuck-faults. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1996, pp:212-219 [Conf]
  59. Gaetano Borriello, Luciano Lavagno, Ross B. Ortega
    Interface synthesis: a vertical slice from digital logic to software components. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1998, pp:693-695 [Conf]
  60. Jordi Cortadella, Michael Kishinevsky, Alex Kondratyev, Luciano Lavagno, Enric Pastor, Alexandre Yakovlev
    Decomposition and technology mapping of speed-independent circuits using Boolean relations. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1997, pp:220-227 [Conf]
  61. Jordi Cortadella, Michael Kishinevsky, Alex Kondratyev, Luciano Lavagno, Alexander Taubin, Alexandre Yakovlev
    Lazy transition systems: application to timing optimization of asynchronous circuits. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1998, pp:324-331 [Conf]
  62. Jordi Cortadella, Michael Kishinevsky, Luciano Lavagno, Alexandre Yakovlev
    Synthesizing Petri nets from state-based models. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1995, pp:164-171 [Conf]
  63. Kurt Keutzer, Luciano Lavagno, Alberto L. Sangiovanni-Vincentelli
    Synthesis for Testability Techniques for Asynchronous Circuits. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1991, pp:326-329 [Conf]
  64. Michael Kishinevsky, Alex Kondratyev, Luciano Lavagno, Alexander Saldanha, Alexander Taubin
    Partial scan delay fault testing of asynchronous circuits. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1997, pp:728-735 [Conf]
  65. Luciano Lavagno, Sharad Malik, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli
    MIS-MV: Optimization of Multi-Level Logic with Multiple-Valued Inputs. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1990, pp:560-563 [Conf]
  66. Radu Marculescu, Amit Nandi, Luciano Lavagno, Alberto L. Sangiovanni-Vincentelli
    System-Level Power/Performance Analysis of Portable Multimedia Systems Communicating over Wireless Channels. [Citation Graph (0, 0)][DBLP]
    ICCAD, 2001, pp:207-0 [Conf]
  67. Hiroshi Saito, Alex Kondratyev, Jordi Cortadella, Luciano Lavagno, Alexandre Yakovlev
    What is the cost of delay insensitivity? [Citation Graph (0, 0)][DBLP]
    ICCAD, 1999, pp:316-323 [Conf]
  68. Alexandre Yakovlev, Luciano Lavagno, Alberto L. Sangiovanni-Vincentelli
    A unified signal transition graph model for asynchronous control circuit synthesis. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1992, pp:104-111 [Conf]
  69. Ivan Blunno, Luciano Lavagno
    Designing an Asynchronous Microcontroller Using Pipefitter. [Citation Graph (0, 0)][DBLP]
    ICCD, 2002, pp:488-493 [Conf]
  70. Gianpiero Cabodi, Luciano Lavagno, Enrico Macii, Massimo Poncino, Stefano Quer, Paolo Camurati, Ellen Sentovich
    Enhancing FSM Traversal by Temporary Re-Encoding. [Citation Graph (0, 0)][DBLP]
    ICCD, 1996, pp:6-11 [Conf]
  71. Jordi Cortadella, Alex Kondratyev, Luciano Lavagno, Christos P. Sotiriou
    Coping with The Variability of Combinational Logic Delays. [Citation Graph (0, 0)][DBLP]
    ICCD, 2004, pp:505-508 [Conf]
  72. Paolo Giusto, Jean-Yves Brunel, Alberto Ferrari, Eliane Fourgeau, Luciano Lavagno, Barry O'Rourke, Alberto L. Sangiovanni-Vincentelli, Emanuele Guasto
    Models of IP's for Automotive Virtual Integration Platforms. [Citation Graph (0, 0)][DBLP]
    ICCD, 2002, pp:379-0 [Conf]
  73. Paolo Giusto, Jean-Yves Brunel, Alberto Ferrari, Eliane Fourgeau, Luciano Lavagno, Alberto L. Sangiovanni-Vincentelli
    Automotive Virtual Integration Platforms: Why's, What's, and How's. [Citation Graph (0, 0)][DBLP]
    ICCD, 2002, pp:370-378 [Conf]
  74. Luciano Lavagno, Alberto L. Sangiovanni-Vincentelli
    Linear Programming for Optimum Hazard Elimination in Asynchronous Circuits. [Citation Graph (0, 0)][DBLP]
    ICCD, 1992, pp:275-278 [Conf]
  75. Alberto Broggi, Gianni Conte, G. Burzio, Luciano Lavagno, Francesco Gregoretti, Claudio Sansoè, Leonardo Maria Reyneri
    PAPRICA-3: A Real-Time Morhphological Image Processor. [Citation Graph (0, 0)][DBLP]
    ICIP (3), 1994, pp:654-658 [Conf]
  76. Luciano Lavagno, Alberto L. Sangiovanni-Vincentelli
    Automated Synthesis of Asynchronous Interface Circuits. [Citation Graph (0, 0)][DBLP]
    Asynchronous Design Methodologies, 1993, pp:107-121 [Conf]
  77. Fabio Campi, Andrea Cappelli, Roberto Guerrieri, Andrea Lodi, Mario Toma, Alberto La Rosa, Luciano Lavagno, Claudio Passerone, Roberto Canegallo
    A Reconfigurable Processor Architecture and Software Development Environment for Embedded Systems. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2003, pp:171- [Conf]
  78. Alberto L. Sangiovanni-Vincentelli, Marco Re, Luciano Lavagno, Gian-Carlo Cardarilli, Roberto Lojacono
    Analysis of the quantization noise effects on the SQNR behaviour in analog to digital conversion. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:334-338 [Conf]
  79. Enrica Filippi, Luciano Lavagno, L. Licciardi, A. Montanaro, M. Paolini, Roberto Passerone, Marco Sgroi, Alberto L. Sangiovanni-Vincentelli
    Intellectual Property Re-use in Embedded System Co-design: An Industrial Case Study. [Citation Graph (0, 0)][DBLP]
    ISSS, 1998, pp:37-42 [Conf]
  80. Luciano Lavagno, Mihai T. Lazarescu, Stefano Quer, Sergio Nocco, Claudio Passerone, Gianpiero Cabodi
    A Symbolic Approach for the Combined Solution of Scheduling and Allocation. [Citation Graph (0, 0)][DBLP]
    ISSS, 2002, pp:237-242 [Conf]
  81. Marcello Lajolo, Luciano Lavagno, Matteo Sonza Reorda, Massimo Violante
    Early Power Estimation for System-on-Chip Designs. [Citation Graph (0, 0)][DBLP]
    PATMOS, 2000, pp:108-117 [Conf]
  82. Francesco Gregoretti, F. Intini, Luciano Lavagno, Roberto Passerone, Leonardo Maria Reyneri
    Design and Implementation of the Control Structure of the PAPRICA-3 Processor. [Citation Graph (0, 0)][DBLP]
    PDP, 1996, pp:290-296 [Conf]
  83. Luciano Lavagno, Marco Di Natale, Alberto Ferrari, Paolo Giusto
    SoftContract: Model-Based Design of Error-Checking Code and Property Monitors. [Citation Graph (0, 0)][DBLP]
    UML Satellite Activities, 2004, pp:150-162 [Conf]
  84. Srinivas Devadas, Sharad Malik, José C. Monteiro, Luciano Lavagno
    CAD Techniques for Embedded System Design. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 1999, pp:608- [Conf]
  85. Luciano Lavagno, Sujit Dey, Rajesh K. Gupta
    Specification, Modeling and Design Tools for System-on-Chip (Tutorial Abstract). [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2002, pp:21-23 [Conf]
  86. Raj S. Mitra, Bishnupriya Bhattacharya, Luciano Lavagno
    Asynchronous Implementation of Synchronous Esterel Specifications. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 1997, pp:348-355 [Conf]
  87. Felice Balarin, Yosinori Watanabe, Harry Hsieh, Luciano Lavagno, Claudio Passerone, Alberto L. Sangiovanni-Vincentelli
    Metropolis: An Integrated Electronic System Design Environment. [Citation Graph (0, 0)][DBLP]
    IEEE Computer, 2003, v:36, n:4, pp:45-52 [Journal]
  88. Felice Balarin, Luciano Lavagno, Praveen K. Murthy, Alberto L. Sangiovanni-Vincentelli
    Scheduling for Embedded Real-Time Systems. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 1998, v:15, n:1, pp:71-82 [Journal]
  89. David Blaauw, Luciano Lavagno
    Guest Editors' Introduction: Hot Topics at This Year's Design Automation Conference. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2002, v:19, n:4, pp:72-73 [Journal]
  90. Luciano Lavagno
    DAC Highlights. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2004, v:21, n:3, pp:259-260 [Journal]
  91. Luciano Lavagno, Nanette Collins
    DAC 97 Panel: Next-Generation HDLs. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 1997, v:14, n:3, pp:7-8 [Journal]
  92. Luciano Lavagno, Limor Fix
    DAC Highlights. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2003, v:20, n:3, pp:88-89 [Journal]
  93. Alberto La Rosa, Luciano Lavagno, Claudio Passerone
    Software Development for High-Performance, Reconfigurable, Embedded Multimedia Systems. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2005, v:22, n:1, pp:28-38 [Journal]
  94. Marco Sgroi, Luciano Lavagno, Alberto L. Sangiovanni-Vincentelli
    Formal Models for Embedded System Design. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2000, v:17, n:2, pp:14-27 [Journal]
  95. Alexandre Yakovlev, Albert Koelmans, Luciano Lavagno
    High-Level Modeling and Design of Asynchronous Interface Logic. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 1995, v:12, n:1, pp:32-40 [Journal]
  96. Gianpiero Cabodi, Sergio Nocco, Stefano Quer, Alex Kondratyev, Luciano Lavagno, Yosinori Watanabe
    A BMC-formulation for the scheduling problem in highly constrained hardware Systems. [Citation Graph (0, 0)][DBLP]
    Electr. Notes Theor. Comput. Sci., 2003, v:89, n:4, pp:- [Journal]
  97. Stefano Quer, Gianpiero Cabodi, Paolo Camurati, Luciano Lavagno, Ellen Sentovich, Robert K. Brayton
    Verification of Similar FSMs by Mixing Incremental Re-encoding, Reachability Analysis, and Combinational Checks. [Citation Graph (0, 0)][DBLP]
    Formal Methods in System Design, 2000, v:17, n:2, pp:107-134 [Journal]
  98. Alexandre Yakovlev, Michael Kishinevsky, Alex Kondratyev, Luciano Lavagno, Marta Pietkiewicz-Koutny
    On the Models for Asynchronous Circuit Behaviour with OR Causality. [Citation Graph (0, 0)][DBLP]
    Formal Methods in System Design, 1996, v:9, n:3, pp:189-233 [Journal]
  99. Alexandre Yakovlev, Luciano Lavagno, Alberto L. Sangiovanni-Vincentelli
    A Unified Signal Transition Graph Model for Asynchronous Control Circuit Synthesis. [Citation Graph (0, 0)][DBLP]
    Formal Methods in System Design, 1996, v:9, n:3, pp:139-188 [Journal]
  100. Jordi Cortadella, Alex Kondratyev, Luciano Lavagno, Alexander Taubin, Yosinori Watanabe
    Quasi-static Scheduling for Concurrent Architectures. [Citation Graph (0, 0)][DBLP]
    Fundam. Inform., 2004, v:62, n:2, pp:171-196 [Journal]
  101. Leonardo Maria Reyneri, Marcello Chiaberge, Luciano Lavagno, Begoña Pino, E. Miranda
    Simulink-Based HW/SW Codesign of Embedded Neuro-Fuzzy Systems. [Citation Graph (0, 0)][DBLP]
    Int. J. Neural Syst., 2000, v:10, n:3, pp:211-226 [Journal]
  102. Alex Kondratyev, Michael Kishinevsky, Alexander Taubin, Jordi Cortadella, Luciano Lavagno
    The Use of Petri Nets for the Design and Verification of Asynchronous Circuits and Systems. [Citation Graph (0, 0)][DBLP]
    Journal of Circuits, Systems, and Computers, 1998, v:8, n:1, pp:67-118 [Journal]
  103. Luciano Lavagno
    Guest Editor?s Introduction: Systems on a Chip--The Next Electronic Frontier. [Citation Graph (0, 0)][DBLP]
    IEEE Micro, 2002, v:22, n:5, pp:14-15 [Journal]
  104. Alberto L. Sangiovanni-Vincentelli, Luciano Lavagno
    Guest Editors' Introduction: Trends and Directions in Microelectronics. [Citation Graph (0, 0)][DBLP]
    IEEE Micro, 2003, v:23, n:3, pp:6-7 [Journal]
  105. Gianpiero Cabodi, Alex Kondratyev, Luciano Lavagno, Sergio Nocco, Stefano Quer, Yosinori Watanabe
    A BMC-based formulation for the scheduling problem of hardware systems. [Citation Graph (0, 0)][DBLP]
    STTT, 2005, v:7, n:2, pp:102-117 [Journal]
  106. Jordi Cortadella, Michael Kishinevsky, Luciano Lavagno, Alexandre Yakovlev
    Deriving Petri Nets for Finite Transition Systems. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1998, v:47, n:8, pp:859-882 [Journal]
  107. Felice Balarin, Massimiliano Chiodo, Paolo Giusto, Harry Hsieh, Attila Jurecska, Luciano Lavagno, Alberto L. Sangiovanni-Vincentelli, Ellen Sentovich, Kei Suzuki
    Synthesis of software programs for embedded control applications. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1999, v:18, n:6, pp:834-849 [Journal]
  108. David T. Blaauw, Luciano Lavagno
    Guest Editorial. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 2003, v:22, n:8, pp:962-963 [Journal]
  109. Jordi Cortadella, Michael Kishinevsky, Steven M. Burns, Alex Kondratyev, Luciano Lavagno, Ken S. Stevens, Alexander Taubin, Alexandre Yakovlev
    Lazy transition systems and asynchronous circuit synthesis withrelative timing assumptions. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 2002, v:21, n:2, pp:109-130 [Journal]
  110. Jordi Cortadella, Michael Kishinevsky, Alex Kondratyev, Luciano Lavagno, Enric Pastor, Alexandre Yakovlev
    Decomposition and technology mapping of speed-independent circuits using Boolean relations. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1999, v:18, n:9, pp:1221-1236 [Journal]
  111. Jordi Cortadella, Michael Kishinevsky, Alex Kondratyev, Luciano Lavagno, Alexandre Yakovlev
    A region-based theory for state assignment in speed-independent circuits. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1997, v:16, n:8, pp:793-812 [Journal]
  112. Jordi Cortadella, Alex Kondratyev, Luciano Lavagno, Claudio Passerone, Yosinori Watanabe
    Quasi-static scheduling of independent tasks for reactive systems. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 2005, v:24, n:10, pp:1492-1514 [Journal]
  113. Jordi Cortadella, Alex Kondratyev, Luciano Lavagno, Christos P. Sotiriou
    Desynchronization: Synthesis of Asynchronous Circuits From Synchronous Specifications. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 2006, v:25, n:10, pp:1904-1921 [Journal]
  114. Harry Hsieh, Felice Balarin, Luciano Lavagno, Alberto L. Sangiovanni-Vincentelli
    Synchronous approach to the functional equivalence of embeddedsystem implementations. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 2001, v:20, n:8, pp:1016-1033 [Journal]
  115. Kurt Keutzer, Luciano Lavagno, Alberto L. Sangiovanni-Vincentelli
    Synthesis for testability techniques for asynchronous circuits. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1995, v:14, n:12, pp:1569-1577 [Journal]
  116. Michael Kishinevsky, Alex Kondratyev, Luciano Lavagno, Alexander Saldanha, Alexander Taubin
    Partial-scan delay fault testing of asynchronous circuits. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1998, v:17, n:11, pp:1184-1199 [Journal]
  117. Luciano Lavagno, Kurt Keutzer, Alberto L. Sangiovanni-Vincentelli
    Synthesis of hazard-free asynchronous circuits with bounded wire delays. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1995, v:14, n:1, pp:61-86 [Journal]
  118. Luciano Lavagno, Cho W. Moon, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli
    An efficient heuristic procedure for solving the state assignment problem for event-based specifications. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1995, v:14, n:1, pp:45-60 [Journal]
  119. Sharad Malik, Luciano Lavagno, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli
    Symbolic minimization of multilevel logic and the input encoding problem. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1992, v:11, n:7, pp:825-843 [Journal]
  120. Alberto La Rosa, Luciano Lavagno, Claudio Passerone
    Implementation of a UMTS turbo decoder on a dynamically reconfigurable platform. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 2005, v:24, n:1, pp:100-106 [Journal]
  121. Paul Caspi, Alberto L. Sangiovanni-Vincentelli, Luís Almeida, Albert Benveniste, Bruno Bouyssounouse, Giorgio C. Buttazzo, Ivica Crnkovic, Werner Damm, Jakob Engblom, Gerhard Fohler, Marisol García-Valls, Hermann Kopetz, Yassine Lakhnech, François Laroussinie, Luciano Lavagno, Giuseppe Lipari, Florence Maraninchi, Philipp Peti, Juan Antonio de la Puente, Norman Scaife, Joseph Sifakis, Robert de Simone, Martin Törngren, Paulo Veríssimo, Andy J. Wellings, Reinhard Wilhelm, Tim A. C. Willemse, Wang Yi
    Guidelines for a graduate curriculum on embedded software and systems. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Embedded Comput. Syst., 2005, v:4, n:3, pp:587-611 [Journal]
  122. Claudio Passerone, Claudio Sansoè, Luciano Lavagno, Patrick C. McGeer, Jonathan Martin, Roberto Passerone, Alberto L. Sangiovanni-Vincentelli
    Modeling reactive systems in Java. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Design Autom. Electr. Syst., 1998, v:3, n:4, pp:515-523 [Journal]
  123. Ivan Blunno, Luciano Lavagno
    Designing an asynchronous microcontroller using Pipefitter. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 2004, v:12, n:7, pp:696-699 [Journal]
  124. Nikolaos Andrikos, Luciano Lavagno, Davide Pandini, Christos P. Sotiriou
    A Fully-Automated Desynchronization Flow for Synchronous Circuits. [Citation Graph (0, 0)][DBLP]
    DAC, 2007, pp:982-985 [Conf]
  125. Marcello Lajolo, Anand Raghunathan, Sujit Dey, Luciano Lavagno
    Cosimulation-based power estimation for system-on-chip design. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 2002, v:10, n:3, pp:253-266 [Journal]

  126. A Symbolic Algorithm for the Synthesis of Bounded Petri Nets. [Citation Graph (, )][DBLP]


  127. Enabling adaptability through elastic clocks. [Citation Graph (, )][DBLP]


  128. Technology mapping of speed-independent circuits based on combinational decomposition and resynthesis. [Citation Graph (, )][DBLP]


  129. Verification and synthesis of counters based on symbolic techniques. [Citation Graph (, )][DBLP]


  130. Testing redundant asynchronous circuits by variable phase splitting. [Citation Graph (, )][DBLP]


  131. Energy optimization framework for WSN design. [Citation Graph (, )][DBLP]


  132. Porting application between wireless sensor network software platforms: TinyOS, MANTIS and ZigBee. [Citation Graph (, )][DBLP]


  133. A Framework for Modeling, Simulation and Automatic Code Generation of Sensor Network Application. [Citation Graph (, )][DBLP]


Search in 0.014secs, Finished in 0.024secs
NOTICE1
System may not be available sometimes or not working properly, since it is still in development with continuous upgrades
NOTICE2
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP
 
System created by asidirop@csd.auth.gr [http://users.auth.gr/~asidirop/] © 2002
for Data Engineering Laboratory, Department of Informatics, Aristotle University © 2002