The SCEAS System
Navigation Menu

Search the dblp DataBase

Title:
Author:

Alberto L. Sangiovanni-Vincentelli: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Felice Balarin, Luciano Lavagno, Claudio Passerone, Alberto L. Sangiovanni-Vincentelli, Marco Sgroi, Yosinori Watanabe
    Modeling and Designing Heterogeneous Systems. [Citation Graph (0, 0)][DBLP]
    Concurrency and Hardware Design, 2002, pp:228-273 [Conf]
  2. Jerry R. Burch, Roberto Passerone, Alberto L. Sangiovanni-Vincentelli
    Overcoming Heterophobia: Modeling Concurrency in Heterogeneous Systems. [Citation Graph (0, 0)][DBLP]
    ACSD, 2001, pp:13-0 [Conf]
  3. Wei Zheng, Jike Chong, Claudio Pinello, Sri Kanajan, Alberto L. Sangiovanni-Vincentelli
    Extensible and Scalable Time Triggered Scheduling. [Citation Graph (0, 0)][DBLP]
    ACSD, 2005, pp:132-141 [Conf]
  4. Shinjiro Kakita, Yosinori Watanabe, Douglas Densmore, Abhijit Davare, Alberto L. Sangiovanni-Vincentelli
    Functional Model Exploration for Multimedia Applications via Algebraic Operators. [Citation Graph (0, 0)][DBLP]
    ACSD, 2006, pp:229-238 [Conf]
  5. Cong Liu, Alex Kondratyev, Yosinori Watanabe, Alberto L. Sangiovanni-Vincentelli, Jorg Desel
    Schedulability Analysis of Petri Nets Based on Structural Properties. [Citation Graph (0, 0)][DBLP]
    ACSD, 2006, pp:69-78 [Conf]
  6. Marco Sgroi, Luciano Lavagno, Yosinori Watanabe, Alberto L. Sangiovanni-Vincentelli
    Quasi-Static Scheduling of Embedded Software Using Equal Conflict Nets. [Citation Graph (0, 0)][DBLP]
    ICATPN, 1999, pp:208-227 [Conf]
  7. Marcello Lajolo, Luciano Lavagno, Alberto L. Sangiovanni-Vincentelli
    Fast Instruction Cache Simulation Strategies in a Hardware/Software Co-Design Environment. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 1999, pp:347-0 [Conf]
  8. Alberto L. Sangiovanni-Vincentelli
    Automotive electronics: steady growth for years to come! [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 2006, pp:- [Conf]
  9. Lin Yuan, Gang Qu, Tiziano Villa, Alberto L. Sangiovanni-Vincentelli
    FSM re-engineering and its application in low power state encoding. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 2005, pp:254-259 [Conf]
  10. Massimo Baleani, Alberto Ferrari, Leonardo Mangeruca, Alberto L. Sangiovanni-Vincentelli, Maurizio Peri, Saverio Pezzini
    Fault-tolerant platforms for automotive safety-critical applications. [Citation Graph (0, 0)][DBLP]
    CASES, 2003, pp:170-177 [Conf]
  11. Alberto L. Sangiovanni-Vincentelli, Grant Martin
    A vision for embedded software. [Citation Graph (0, 0)][DBLP]
    CASES, 2001, pp:1-7 [Conf]
  12. Felice Balarin, Alberto L. Sangiovanni-Vincentelli
    A Verification Strategy for Timing-Constrained Systems. [Citation Graph (0, 0)][DBLP]
    CAV, 1992, pp:151-163 [Conf]
  13. Felice Balarin, Alberto L. Sangiovanni-Vincentelli
    An Iterative Approach to Language Containment. [Citation Graph (0, 0)][DBLP]
    CAV, 1993, pp:29-40 [Conf]
  14. Felice Balarin, Alberto L. Sangiovanni-Vincentelli
    On the Automatic Computation of Network Invariants. [Citation Graph (0, 0)][DBLP]
    CAV, 1994, pp:234-246 [Conf]
  15. Robert K. Brayton, Gary D. Hachtel, Alberto L. Sangiovanni-Vincentelli, Fabio Somenzi, Adnan Aziz, Szu-Tsung Cheng, Stephen A. Edwards, Sunil P. Khatri, Yuji Kukimoto, Abelardo Pardo, Shaz Qadeer, Rajeev K. Ranjan, Shaker Sarwary, Thomas R. Shiple, Gitanjali Swamy, Tiziano Villa
    VIS: A System for Verification and Synthesis. [Citation Graph (0, 0)][DBLP]
    CAV, 1996, pp:428-432 [Conf]
  16. Luca P. Carloni, Kenneth L. McMillan, Alberto L. Sangiovanni-Vincentelli
    Latency Insensitive Protocols. [Citation Graph (0, 0)][DBLP]
    CAV, 1999, pp:123-133 [Conf]
  17. Thomas R. Shiple, Massimiliano Chiodo, Alberto L. Sangiovanni-Vincentelli, Robert K. Brayton
    Automatic Reduction in CTL Compositional Model Checking. [Citation Graph (0, 0)][DBLP]
    CAV, 1992, pp:234-247 [Conf]
  18. Luca P. Carloni, Alberto L. Sangiovanni-Vincentelli
    On-chip communication design: roadblocks and avenues. [Citation Graph (0, 0)][DBLP]
    CODES+ISSS, 2003, pp:75-76 [Conf]
  19. Felice Balarin, Massimiliano Chiodo, Attila Jurecska, Luciano Lavagno, Bassam Tabbara, Alberto L. Sangiovanni-Vincentelli
    Automatic Generation of a Real-Time Operating System for Embedded Systems. [Citation Graph (0, 0)][DBLP]
    CODES, 1997, pp:95-100 [Conf]
  20. Felice Balarin, Luciano Lavagno, Claudio Passerone, Alberto L. Sangiovanni-Vincentelli, Yosinori Watanabe, Guang Yang
    Concurrent execution semantics and sequential simulation algorithms for the metropolis meta-model. [Citation Graph (0, 0)][DBLP]
    CODES, 2002, pp:13-18 [Conf]
  21. Massimo Baleani, Frank Gennari, Yunjian Jiang, Yatish Patel, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli
    HW/SW partitioning and code generation of embedded control applications on a reconfigurable architecture platform. [Citation Graph (0, 0)][DBLP]
    CODES, 2002, pp:151-156 [Conf]
  22. Jie Liu, Marcello Lajolo, Alberto L. Sangiovanni-Vincentelli
    Software timing analysis using HW/SW cosimulation and instruction set simulator. [Citation Graph (0, 0)][DBLP]
    CODES, 1998, pp:65-69 [Conf]
  23. Harry Hsieh, Alberto L. Sangiovanni-Vincentelli
    Modeling micro-controller peripherals for high-level co-simulation and synthesis. [Citation Graph (0, 0)][DBLP]
    CODES, 1997, pp:127-134 [Conf]
  24. H. J. H. N. Kenter, Claudio Passerone, W. J. M. Smits, Yosinori Watanabe, Alberto L. Sangiovanni-Vincentelli
    Designing digital video systems: modeling and scheduling. [Citation Graph (0, 0)][DBLP]
    CODES, 1999, pp:64-68 [Conf]
  25. Claudio Passerone, Roberto Passerone, Claudio Sansoè, Jonathan Martin, Alberto L. Sangiovanni-Vincentelli, Rick McGeer
    Modeling reactive systems in Java. [Citation Graph (0, 0)][DBLP]
    CODES, 1998, pp:15-19 [Conf]
  26. Marcello Lajolo, Mihai Lazarescu, Alberto L. Sangiovanni-Vincentelli
    A compilation-based software estimation scheme for hardware/software co-simulation. [Citation Graph (0, 0)][DBLP]
    CODES, 1999, pp:85-89 [Conf]
  27. Marcello Lajolo, Anand Raghunathan, Sujit Dey, Luciano Lavagno, Alberto L. Sangiovanni-Vincentelli
    A case study on modeling shared memory access effects during performance analysis of HW/SW systems. [Citation Graph (0, 0)][DBLP]
    CODES, 1998, pp:117-121 [Conf]
  28. Luciano Lavagno, Massimiliano Chiodo, Paolo Giusto, Attila Jurecska, Harry Hsieh, S. Yee, Alberto L. Sangiovanni-Vincentelli, Kei Suzuki
    A case study in computer-aided codesign of embedded controllers. [Citation Graph (0, 0)][DBLP]
    CODES, 1994, pp:220-224 [Conf]
  29. Julio Leao da Silva Jr., Marco Sgroi, Fernando De Bernardinis, Suet-Fei Li, Alberto L. Sangiovanni-Vincentelli, Jan M. Rabaey
    Wireless protocols design: challenges and opportunities. [Citation Graph (0, 0)][DBLP]
    CODES, 2000, pp:147-151 [Conf]
  30. Janos Sztipanovits, C. John Glossner, Trevor N. Mudge, Chris Rowen, Alberto L. Sangiovanni-Vincentelli, Wayne Wolf, Feng Zhao
    Grand challenges in embedded systems. [Citation Graph (0, 0)][DBLP]
    CODES+ISSS, 2005, pp:333- [Conf]
  31. Bassam Tabbara, Abdallah Tabbara, Alberto L. Sangiovanni-Vincentelli
    Task response time optimization using cost-based operation motion. [Citation Graph (0, 0)][DBLP]
    CODES, 2000, pp:110-114 [Conf]
  32. Alberto L. Sangiovanni-Vincentelli, Marco Sgroi, Luciano Lavagno
    Formal Models for Communication-Based Design. [Citation Graph (0, 0)][DBLP]
    CONCUR, 2000, pp:29-47 [Conf]
  33. Adnan Aziz, Felice Balarin, Szu-Tsung Cheng, Ramin Hojati, Timothy Kam, Sriram C. Krishnan, Rajeev K. Ranjan, Thomas R. Shiple, Vigyan Singhal, Serdar Tasiran, Huey-Yih Wang, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli
    HSIS: A BDD-Based Environment for Formal Verification. [Citation Graph (0, 0)][DBLP]
    DAC, 1994, pp:454-459 [Conf]
  34. Felice Balarin, Harry Hsieh, Attila Jurecska, Luciano Lavagno, Alberto L. Sangiovanni-Vincentelli
    Formal Verification of Embedded Systems based on CFSM Networks. [Citation Graph (0, 0)][DBLP]
    DAC, 1996, pp:568-571 [Conf]
  35. Felice Balarin, Alberto L. Sangiovanni-Vincentelli
    Schedule Validation for Embedded Reactive Real-Time Systems. [Citation Graph (0, 0)][DBLP]
    DAC, 1997, pp:52-57 [Conf]
  36. Kaustav Banerjee, Amit Mehrotra, Alberto L. Sangiovanni-Vincentelli, Chenming Hu
    On Thermal Effects in Deep Sub-Micron VLSI Interconnects. [Citation Graph (0, 0)][DBLP]
    DAC, 1999, pp:885-891 [Conf]
  37. Maria Domenica Di Benedetto, Pasquale Lucibello, Alberto L. Sangiovanni-Vincentelli, K. Yamaguchi
    Chain Closure: A Problem in Molecular CAD. [Citation Graph (0, 0)][DBLP]
    DAC, 1994, pp:497-502 [Conf]
  38. Fernando De Bernardinis, M. I. Jordan, Alberto L. Sangiovanni-Vincentelli
    Support vector machines for analog circuit performance representation. [Citation Graph (0, 0)][DBLP]
    DAC, 2003, pp:964-969 [Conf]
  39. Fernando De Bernardinis, Pierluigi Nuzzo, Alberto L. Sangiovanni-Vincentelli
    Mixed signal design space exploration through analog platforms. [Citation Graph (0, 0)][DBLP]
    DAC, 2005, pp:875-880 [Conf]
  40. Douglas Braun, Jeffrey L. Burns, Srinivas Devadas, Hi-Keung Tony Ma, Kartikeya Mayaram, Fabio Romeo, Alberto L. Sangiovanni-Vincentelli
    Chameleon: a new multi-layer channel router. [Citation Graph (0, 0)][DBLP]
    DAC, 1986, pp:495-502 [Conf]
  41. Raul Camposano, Kurt Keutzer, Jerry Fiddler, Alberto L. Sangiovanni-Vincentelli, Jim Lansford
    HW and SW in Embedded System Design: Loveboat, Shipwreck, or Ships Passing in the Night. [Citation Graph (0, 0)][DBLP]
    DAC, 1999, pp:76-77 [Conf]
  42. Luca P. Carloni, Alberto L. Sangiovanni-Vincentelli
    Performance analysis and optimization of latency insensitive systems. [Citation Graph (0, 0)][DBLP]
    DAC, 2000, pp:361-367 [Conf]
  43. Andrea Casotto, A. Richard Newton, Alberto L. Sangiovanni-Vincentelli
    Design Management Based on Design Traces. [Citation Graph (0, 0)][DBLP]
    DAC, 1990, pp:136-141 [Conf]
  44. Edoardo Charbon, Enrico Malavasi, Davide Pandini, Alberto L. Sangiovanni-Vincentelli
    Simultaneous Placement and Module Optimization of Analog IC's. [Citation Graph (0, 0)][DBLP]
    DAC, 1994, pp:31-35 [Conf]
  45. Xi Chen, Abhijit Davare, Harry Hsieh, Alberto L. Sangiovanni-Vincentelli, Yosinori Watanabe
    Simulation based deadlock analysis for system level designs. [Citation Graph (0, 0)][DBLP]
    DAC, 2005, pp:260-265 [Conf]
  46. Massimiliano Chiodo, Paolo Giusto, Attila Jurecska, Luciano Lavagno, Harry Hsieh, Kei Suzuki, Alberto L. Sangiovanni-Vincentelli, Ellen Sentovich
    Synthesis of Software Programs for Embedded Control Applications. [Citation Graph (0, 0)][DBLP]
    DAC, 1995, pp:587-592 [Conf]
  47. Umakanta Choudhury, Alberto L. Sangiovanni-Vincentelli
    Constraint Generation for Routing Analog Circuits. [Citation Graph (0, 0)][DBLP]
    DAC, 1990, pp:561-566 [Conf]
  48. Ronald Collett, Mike Gianfagna, Michel Courtoy, Martin Baynes, Johan Van Ginderdeuren, Kenneth L. McMillan, Stephen Ricca, Alberto L. Sangiovanni-Vincentelli, Steve Sapiro, Naeem Zafar
    Panel: Complex System Verification: The Challenge Ahead. [Citation Graph (0, 0)][DBLP]
    DAC, 1994, pp:320- [Conf]
  49. Jordi Cortadella, Alex Kondratyev, Luciano Lavagno, Marc Massot, Sandra Moral, Claudio Passerone, Yosinori Watanabe, Alberto L. Sangiovanni-Vincentelli
    Task generation and compile-time scheduling for mixed data-control embedded software. [Citation Graph (0, 0)][DBLP]
    DAC, 2000, pp:489-494 [Conf]
  50. Tullio Cuatto, Claudio Passerone, Luciano Lavagno, Attila Jurecska, Antonino Damiano, Claudio Sansoè, Alberto L. Sangiovanni-Vincentelli
    A Case Study in Embedded System Design: An Engine Control Unit. [Citation Graph (0, 0)][DBLP]
    DAC, 1998, pp:804-807 [Conf]
  51. Luca Daniel, Alberto L. Sangiovanni-Vincentelli, Jacob White
    Using Conduction Modes Basis Functions for Efficient Electromagnetic Analysis of On-Chip and Off-Chip Interconnect. [Citation Graph (0, 0)][DBLP]
    DAC, 2001, pp:563-566 [Conf]
  52. Abhijit Davare, Kelvin Lwin, Alex Kondratyev, Alberto L. Sangiovanni-Vincentelli
    The best of both worlds: the efficient asynchronous implementation of synchronous specifications. [Citation Graph (0, 0)][DBLP]
    DAC, 2004, pp:588-591 [Conf]
  53. Harry Hsieh, Felice Balarin, Luciano Lavagno, Alberto L. Sangiovanni-Vincentelli
    Efficient methods for embedded system design space exploration. [Citation Graph (0, 0)][DBLP]
    DAC, 2000, pp:607-612 [Conf]
  54. Mitsuru Igusa, Mark Beardslee, Alberto L. Sangiovanni-Vincentelli
    ORCA a Sea-of-Gates Place and Route System. [Citation Graph (0, 0)][DBLP]
    DAC, 1989, pp:122-127 [Conf]
  55. Timothy Kam, Tiziano Villa, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli
    A Fully Implicit Algorithm for Exact State Minimization. [Citation Graph (0, 0)][DBLP]
    DAC, 1994, pp:684-690 [Conf]
  56. Masamichi Kawarabayashi, Narendra V. Shenoy, Alberto L. Sangiovanni-Vincentelli
    A Verification Technique for Gated Clock. [Citation Graph (0, 0)][DBLP]
    DAC, 1993, pp:123-127 [Conf]
  57. Sunil P. Khatri, Amit Mehrotra, Robert K. Brayton, Ralph H. J. M. Otten, Alberto L. Sangiovanni-Vincentelli
    A Novel VLSI Layout Fabric for Deep Sub-Micron Applications. [Citation Graph (0, 0)][DBLP]
    DAC, 1999, pp:491-496 [Conf]
  58. Sunil P. Khatri, Amit Narayan, Sriram C. Krishnan, Kenneth L. McMillan, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli
    Engineering Change in a Non-Deterministic FSM Setting. [Citation Graph (0, 0)][DBLP]
    DAC, 1996, pp:451-456 [Conf]
  59. William K. C. Lam, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli
    Circuit Delay Models and Their Exact Computation Using Timed Boolean Functions. [Citation Graph (0, 0)][DBLP]
    DAC, 1993, pp:128-134 [Conf]
  60. William K. C. Lam, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli
    Exact Minimum Cycle Times for Finite State Machines. [Citation Graph (0, 0)][DBLP]
    DAC, 1994, pp:100-105 [Conf]
  61. William K. C. Lam, Alexander Saldanha, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli
    Delay Fault Coverage and Performance Tradeoffs. [Citation Graph (0, 0)][DBLP]
    DAC, 1993, pp:446-452 [Conf]
  62. Luciano Lavagno, Kurt Keutzer, Alberto L. Sangiovanni-Vincentelli
    Algorithms for Synthesis of Hazard-Free Asynchronous Circuits. [Citation Graph (0, 0)][DBLP]
    DAC, 1991, pp:302-308 [Conf]
  63. Luciano Lavagno, Cho W. Moon, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli
    Solving the State Assignment Problem for Signal Transition Graphs. [Citation Graph (0, 0)][DBLP]
    DAC, 1992, pp:568-572 [Conf]
  64. Luciano Lavagno, Patrick C. McGeer, Alexander Saldanha, Alberto L. Sangiovanni-Vincentelli
    Timed Shannon Circuits: A Power-Efficient Design Style and Synthesis Tool. [Citation Graph (0, 0)][DBLP]
    DAC, 1995, pp:254-260 [Conf]
  65. Hi-Keung Tony Ma, Srinivas Devadas, Alberto L. Sangiovanni-Vincentelli, R. Wei
    Logic Verification Algorithms and Their Parallel Implementation. [Citation Graph (0, 0)][DBLP]
    DAC, 1987, pp:283-290 [Conf]
  66. Hi-Keung Tony Ma, Alberto L. Sangiovanni-Vincentelli
    Mixed-level fault coverage estimation. [Citation Graph (0, 0)][DBLP]
    DAC, 1986, pp:553-559 [Conf]
  67. Edward W. Y. Liu, Henry C. Chang, Alberto L. Sangiovanni-Vincentelli
    Analog System Verification in the Presence of Parasitics Using Behavioral Simulation. [Citation Graph (0, 0)][DBLP]
    DAC, 1993, pp:159-163 [Conf]
  68. Sharad Malik, D. K. Arvind, Edward Lee, Phil Koopman, Alberto L. Sangiovanni-Vincentelli, Wayne Wolf
    Embedded systems education (panel abstract). [Citation Graph (0, 0)][DBLP]
    DAC, 2000, pp:519- [Conf]
  69. Abdul A. Malik, Robert K. Brayton, A. Richard Newton, Alberto L. Sangiovanni-Vincentelli
    Reduced Offsets for Two-Level Multi-Valued Logic Minimization. [Citation Graph (0, 0)][DBLP]
    DAC, 1990, pp:290-296 [Conf]
  70. Patrick C. McGeer, Jagesh V. Sanghavi, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli
    Espresso-Signature: A New Exact Minimizer for Logic Functions. [Citation Graph (0, 0)][DBLP]
    DAC, 1993, pp:618-624 [Conf]
  71. Patrick C. McGeer, Steven Trimberger, Erik Carlson, Dave Hightower, Ulrich Lauther, Alberto L. Sangiovanni-Vincentelli
    DA Algorithms in Non-EDA Applications: How Universal Are Our Techniques? (Panel). [Citation Graph (0, 0)][DBLP]
    DAC, 1994, pp:503- [Conf]
  72. Trevor Meyerowitz, Claudio Pinello, Alberto L. Sangiovanni-Vincentelli
    A tool for describing and evaluating hierarchical real-time bus scheduling policies. [Citation Graph (0, 0)][DBLP]
    DAC, 2003, pp:312-317 [Conf]
  73. Paolo Miliozzi, Iasson Vassiliou, Edoardo Charbon, Enrico Malavasi, Alberto L. Sangiovanni-Vincentelli
    Use of Sensitivities and Generalized Substrate Models in Mixed-Signal IC Design. [Citation Graph (0, 0)][DBLP]
    DAC, 1996, pp:227-232 [Conf]
  74. Rajeev Murgai, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli
    An Improved Synthesis Algorithm for Multiplexor-Based PGA's. [Citation Graph (0, 0)][DBLP]
    DAC, 1992, pp:380-386 [Conf]
  75. Rajeev Murgai, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli
    Sequential Synthesis for Table Look Up Programmable Gate Arrays. [Citation Graph (0, 0)][DBLP]
    DAC, 1993, pp:224-229 [Conf]
  76. Rajeev Murgai, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli
    Optimum Functional Decomposition Using Encoding. [Citation Graph (0, 0)][DBLP]
    DAC, 1994, pp:408-414 [Conf]
  77. Rajeev Murgai, Yoshihito Nishizaki, Narendra V. Shenoy, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli
    Logic Synthesis for Programmable Gate Arrays. [Citation Graph (0, 0)][DBLP]
    DAC, 1990, pp:620-625 [Conf]
  78. Marco Di Natale, Alberto L. Sangiovanni-Vincentelli, Felice Balarin
    Task scheduling with RT constraints. [Citation Graph (0, 0)][DBLP]
    DAC, 2000, pp:483-488 [Conf]
  79. Alessandro Pinto, Luca P. Carloni, Alberto L. Sangiovanni-Vincentelli
    Constraint-driven communication synthesis. [Citation Graph (0, 0)][DBLP]
    DAC, 2002, pp:783-788 [Conf]
  80. Claudio Passerone, Luciano Lavagno, Massimiliano Chiodo, Alberto L. Sangiovanni-Vincentelli
    Fast Hardware/Software Co-Simulation for Virtual Prototyping and Trade-Off Analysis. [Citation Graph (0, 0)][DBLP]
    DAC, 1997, pp:389-394 [Conf]
  81. Roberto Passerone, James A. Rowson, Alberto L. Sangiovanni-Vincentelli
    Automatic Synthesis of Interfaces Between Incompatible Protocols. [Citation Graph (0, 0)][DBLP]
    DAC, 1998, pp:8-13 [Conf]
  82. Howard S. Rifkin, William Heller, Steve Law, Misha Burich, Alberto L. Sangiovanni-Vincentelli
    Floor planning systems (panel session). [Citation Graph (0, 0)][DBLP]
    DAC, 1986, pp:630- [Conf]
  83. James A. Rowson, Alberto L. Sangiovanni-Vincentelli
    Interface-Based Design. [Citation Graph (0, 0)][DBLP]
    DAC, 1997, pp:178-183 [Conf]
  84. Alexander Saldanha, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli
    Equivalence of Robust Delay-Fault and Single Stuck-Fault Test Generation. [Citation Graph (0, 0)][DBLP]
    DAC, 1992, pp:173-176 [Conf]
  85. Alexander Saldanha, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli
    Circuit Structure Relations to Redundancy and Delay: The KMS Algorithm Revisited. [Citation Graph (0, 0)][DBLP]
    DAC, 1992, pp:245-248 [Conf]
  86. Alexander Saldanha, Heather Harkness, Patrick C. McGeer, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli
    Performance Optimization Using Exact Sensitization. [Citation Graph (0, 0)][DBLP]
    DAC, 1994, pp:425-429 [Conf]
  87. Alexander Saldanha, Tiziano Villa, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli
    A Framework for Satisfying Input and Output Encoding Constraints. [Citation Graph (0, 0)][DBLP]
    DAC, 1991, pp:170-175 [Conf]
  88. Alexander Saldanha, Albert R. Wang, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli
    Multi-level Logic Simplification Using Don't Cares and Filters. [Citation Graph (0, 0)][DBLP]
    DAC, 1989, pp:277-282 [Conf]
  89. Jagesh V. Sanghavi, Rajeev K. Ranjan, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli
    High Performance BDD Package By Exploiting Memory Hiercharchy. [Citation Graph (0, 0)][DBLP]
    DAC, 1996, pp:635-640 [Conf]
  90. Alberto L. Sangiovanni-Vincentelli
    Testing Strategies for the 1990's (Panel Abstract). [Citation Graph (0, 0)][DBLP]
    DAC, 1990, pp:338- [Conf]
  91. Alberto L. Sangiovanni-Vincentelli
    Testability Solutions: Who Really Wants Them? (Panel Abstract). [Citation Graph (0, 0)][DBLP]
    DAC, 1991, pp:611- [Conf]
  92. Alberto L. Sangiovanni-Vincentelli, Luca P. Carloni, Fernando De Bernardinis, Marco Sgroi
    Benefits and challenges for platform-based design. [Citation Graph (0, 0)][DBLP]
    DAC, 2004, pp:409-414 [Conf]
  93. Alberto L. Sangiovanni-Vincentelli, Patrick C. McGeer, Alexander Saldanha
    Verification of Electronic Systems. [Citation Graph (0, 0)][DBLP]
    DAC, 1996, pp:106-111 [Conf]
  94. Carl Sechen, Alberto L. Sangiovanni-Vincentelli
    TimberWolf3.2: a new standard cell placement and global routing package. [Citation Graph (0, 0)][DBLP]
    DAC, 1986, pp:432-439 [Conf]
  95. Marco Sgroi, Michael Sheets, Andrew Mihal, Kurt Keutzer, Sharad Malik, Jan M. Rabaey, Alberto L. Sangiovanni-Vincentelli
    Addressing the System-on-a-Chip Interconnect Woes Through Communication-Based Design. [Citation Graph (0, 0)][DBLP]
    DAC, 2001, pp:667-672 [Conf]
  96. Narendra V. Shenoy, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli
    Resynthesis of Multi-Phase Pipelines. [Citation Graph (0, 0)][DBLP]
    DAC, 1993, pp:490-496 [Conf]
  97. Narendra V. Shenoy, Kanwar Jit Singh, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli
    On the Temporal Equivalence of Sequential Circuits. [Citation Graph (0, 0)][DBLP]
    DAC, 1992, pp:405-409 [Conf]
  98. Hyunchul Shin, Alberto L. Sangiovanni-Vincentelli, Carlo H. Séquin
    Two-dimensional compaction by ``zone refining''. [Citation Graph (0, 0)][DBLP]
    DAC, 1986, pp:115-122 [Conf]
  99. Thomas R. Shiple, Ramin Hojati, Alberto L. Sangiovanni-Vincentelli, Robert K. Brayton
    Heuristic Minimization of BDDs Using Don't Cares. [Citation Graph (0, 0)][DBLP]
    DAC, 1994, pp:225-231 [Conf]
  100. Kanwar Jit Singh, Alberto L. Sangiovanni-Vincentelli
    A Heuristic Algorithm for the Fanout Problem. [Citation Graph (0, 0)][DBLP]
    DAC, 1990, pp:357-360 [Conf]
  101. Kei Suzuki, Alberto L. Sangiovanni-Vincentelli
    Efficient Software Performance Estimation Methods for Hardware/Software Codesign. [Citation Graph (0, 0)][DBLP]
    DAC, 1996, pp:605-610 [Conf]
  102. Tiziano Villa, Alberto L. Sangiovanni-Vincentelli
    NOVA: State Assignment of Finite State Machines for Optimal Two-level Logic Implementations. [Citation Graph (0, 0)][DBLP]
    DAC, 1989, pp:327-332 [Conf]
  103. Donald M. Webber, Alberto L. Sangiovanni-Vincentelli
    Circuit Simulation on the Connection Machine. [Citation Graph (0, 0)][DBLP]
    DAC, 1987, pp:108-113 [Conf]
  104. N. Weiner, Alberto L. Sangiovanni-Vincentelli
    Timing Analysis in a Logic Synthesis Environment. [Citation Graph (0, 0)][DBLP]
    DAC, 1989, pp:655-661 [Conf]
  105. Qi Zhu, Nathan Kitchen, Andreas Kuehlmann, Alberto L. Sangiovanni-Vincentelli
    SAT sweeping with local observability don't-cares. [Citation Graph (0, 0)][DBLP]
    DAC, 2006, pp:229-234 [Conf]
  106. Ruey-Sing Wei, Alberto L. Sangiovanni-Vincentelli
    PLATYPUS: a PLA test pattern generation tool. [Citation Graph (0, 0)][DBLP]
    DAC, 1985, pp:197-203 [Conf]
  107. Massimo Baleani, Alberto Ferrari, Leonardo Mangeruca, Alberto L. Sangiovanni-Vincentelli, Ulrich Freund, Erhard Schlenker, Hans-Jörg Wolff
    Correct-by-Construction Transformations across Design Environments for Model-Based Embedded Software Development. [Citation Graph (0, 0)][DBLP]
    DATE, 2005, pp:1044-1049 [Conf]
  108. Massimo Baleani, Alberto Ferrari, Alberto L. Sangiovanni-Vincentelli, Claudio Turchetti
    HW/SW Codesign of an Engine Management System. [Citation Graph (0, 0)][DBLP]
    DATE, 2000, pp:263-0 [Conf]
  109. Fernando De Bernardinis, Alberto L. Sangiovanni-Vincentelli
    A Methodology for System-Level Analog Design Space Exploration. [Citation Graph (0, 0)][DBLP]
    DATE, 2004, pp:676-677 [Conf]
  110. Alvise Bonivento, Luca P. Carloni, Alberto L. Sangiovanni-Vincentelli
    Platform-based design of wireless sensor networks for industrial applications. [Citation Graph (0, 0)][DBLP]
    DATE, 2006, pp:1103-1107 [Conf]
  111. Douglas Densmore, Adam Donlin, Alberto L. Sangiovanni-Vincentelli
    FPGA architecture characterization for system level performance analysis. [Citation Graph (0, 0)][DBLP]
    DATE, 2006, pp:734-739 [Conf]
  112. Douglas Densmore, Sanjay Rekhi, Alberto L. Sangiovanni-Vincentelli
    Microarchitecture Development via Metropolis Successive Platform Refinement. [Citation Graph (0, 0)][DBLP]
    DATE, 2004, pp:346-351 [Conf]
  113. Sri Kanajan, Haibo Zeng, Claudio Pinello, Alberto L. Sangiovanni-Vincentelli
    Exploring trade-off's between centralized versus decentralized automotive architectures using a virtual integration environment. [Citation Graph (0, 0)][DBLP]
    DATE, 2006, pp:548-553 [Conf]
  114. Chunghee Kim, Luciano Lavagno, Alberto L. Sangiovanni-Vincentelli
    Free MDD-Based Software Optimization Techniques for Embedded Systems. [Citation Graph (0, 0)][DBLP]
    DATE, 2000, pp:14-0 [Conf]
  115. Leonardo Mangeruca, Alberto Ferrari, Alberto L. Sangiovanni-Vincentelli, Andrea Pierantoni, Michele Pennese
    System Level Design of Embedded Controllers: Knock Detection, A Case Study in the Automotive Domain. [Citation Graph (0, 0)][DBLP]
    DATE, 2003, pp:20232-20237 [Conf]
  116. Radu Marculescu, Jan M. Rabaey, Alberto L. Sangiovanni-Vincentelli
    Is "Network" the next "Big Idea" in design? [Citation Graph (0, 0)][DBLP]
    DATE, 2006, pp:254-256 [Conf]
  117. Alessandra Nardi, Alberto L. Sangiovanni-Vincentelli
    Synthesis for Manufacturability: A Sanity Check. [Citation Graph (0, 0)][DBLP]
    DATE, 2004, pp:796-803 [Conf]
  118. Claudio Pinello, Luca P. Carloni, Alberto L. Sangiovanni-Vincentelli
    Fault-Tolerant Deployment of Embedded Software for Cost-Sensitive Real-Time Feedback-Control Applications. [Citation Graph (0, 0)][DBLP]
    DATE, 2004, pp:1164-1169 [Conf]
  119. Alberto L. Sangiovanni-Vincentelli
    Integrated Electronics in the Car and the Design Chain Evolution or Revolution? [Citation Graph (0, 0)][DBLP]
    DATE, 2005, pp:532-533 [Conf]
  120. Julio Leao da Silva Jr., J. Shamberger, M. Josie Ammer, C. Guo, Suet-Fei Li, Rahul C. Shah, Tim Tuan, Michael Sheets, Jan M. Rabaey, B. Nikolic, Alberto L. Sangiovanni-Vincentelli, Paul K. Wright
    Design methodology for PicoRadio networks. [Citation Graph (0, 0)][DBLP]
    DATE, 2001, pp:314-325 [Conf]
  121. Bassam Tabbara, Marco Sgroi, Alberto L. Sangiovanni-Vincentelli, Enrica Filippi, Luciano Lavagno
    Fast Hardware-Software Co-simulation Using VHDL Models. [Citation Graph (0, 0)][DBLP]
    DATE, 1999, pp:309-0 [Conf]
  122. Nina Yevtushenko, Tiziano Villa, Robert K. Brayton, Alexandre Petrenko, Alberto L. Sangiovanni-Vincentelli
    Equisolvability of Series vs. Controller's Topology in Synchronous Language Equations. [Citation Graph (0, 0)][DBLP]
    DATE, 2003, pp:11154-11155 [Conf]
  123. Guang Yang, Xi Chen, Felice Balarin, Harry Hsieh, Alberto L. Sangiovanni-Vincentelli
    Communication and co-simulation infrastructure for heterogeneous system integration. [Citation Graph (0, 0)][DBLP]
    DATE, 2006, pp:462-467 [Conf]
  124. Gabriele Luculli, Alberto L. Sangiovanni-Vincentelli
    Analysis of DSP-Kernel Software by Implicit Cache Simulation. [Citation Graph (0, 0)][DBLP]
    ECBS, 2001, pp:282-288 [Conf]
  125. Mark L. McKelvin Jr., Jonathan Sprinkle, Claudio Pinello, Alberto L. Sangiovanni-Vincentelli
    Fault Tolerant Data Flow Modeling Using the Generic Modeling Environment. [Citation Graph (0, 0)][DBLP]
    ECBS, 2005, pp:229-235 [Conf]
  126. Massimo Baleani, Alberto Ferrari, Leonardo Mangeruca, Alberto L. Sangiovanni-Vincentelli
    Efficient embedded software design with synchronous models. [Citation Graph (0, 0)][DBLP]
    EMSOFT, 2005, pp:187-190 [Conf]
  127. Albert Benveniste, Benoît Caillaud, Luca P. Carloni, Paul Caspi, Alberto L. Sangiovanni-Vincentelli
    Heterogeneous reactive systems modeling: capturing causality and the correctness of loosely time-triggered architectures (LTTA). [Citation Graph (0, 0)][DBLP]
    EMSOFT, 2004, pp:220-229 [Conf]
  128. Albert Benveniste, Luca P. Carloni, Paul Caspi, Alberto L. Sangiovanni-Vincentelli
    Heterogeneous Reactive Systems Modeling and Correct-by-Construction Deployment. [Citation Graph (0, 0)][DBLP]
    EMSOFT, 2003, pp:35-50 [Conf]
  129. Albert Benveniste, Benoît Caillaud, Luca P. Carloni, Alberto L. Sangiovanni-Vincentelli
    Tag machines. [Citation Graph (0, 0)][DBLP]
    EMSOFT, 2005, pp:255-263 [Conf]
  130. Alvise Bonivento, Luca P. Carloni, Alberto L. Sangiovanni-Vincentelli
    Rialto: a bridge between description and implementation of control algorithms for wireless sensor networks. [Citation Graph (0, 0)][DBLP]
    EMSOFT, 2005, pp:183-186 [Conf]
  131. Tak-John Koo, Judith Liebman, Cedric Ma, Benjamin Horowitz, Alberto L. Sangiovanni-Vincentelli, Shankar Sastry
    Platform-Based Embedded Software Design for Multi-vehicle Multi-modal Systems. [Citation Graph (0, 0)][DBLP]
    EMSOFT, 2002, pp:32-45 [Conf]
  132. Gregor Gößler, Alberto L. Sangiovanni-Vincentelli
    Compositional Modeling in Metropolis. [Citation Graph (0, 0)][DBLP]
    EMSOFT, 2002, pp:93-107 [Conf]
  133. Jerry R. Burch, Roberto Passerone, Alberto L. Sangiovanni-Vincentelli
    Using Multiple Levels of Abstractions in Embedded Software Design. [Citation Graph (0, 0)][DBLP]
    EMSOFT, 2001, pp:324-343 [Conf]
  134. Cong Liu, Alex Kondratyev, Yosinori Watanabe, Alberto L. Sangiovanni-Vincentelli
    A structural approach to quasi-static schedulability analysis of communicating concurrent programs. [Citation Graph (0, 0)][DBLP]
    EMSOFT, 2005, pp:10-16 [Conf]
  135. Mark L. McKelvin Jr., Gabriel Eirea, Claudio Pinello, Sri Kanajan, Alberto L. Sangiovanni-Vincentelli
    A formal approach to fault tree synthesis for the analysis of distributed fault tolerant systems. [Citation Graph (0, 0)][DBLP]
    EMSOFT, 2005, pp:237-246 [Conf]
  136. Roberto Passerone, Jerry R. Burch, Alberto L. Sangiovanni-Vincentelli
    Conservative approximations for heterogeneous design. [Citation Graph (0, 0)][DBLP]
    EMSOFT, 2004, pp:155-164 [Conf]
  137. Guang Yang, Alberto L. Sangiovanni-Vincentelli, Yosinori Watanabe, Felice Balarin
    Separation of concerns: overhead in modeling and efficient simulation techniques. [Citation Graph (0, 0)][DBLP]
    EMSOFT, 2004, pp:44-53 [Conf]
  138. Albert Benveniste, Benoît Caillaud, Luca P. Carloni, Paul Caspi, Alberto L. Sangiovanni-Vincentelli, Stavros Tripakis
    Communication by sampling in time-sensitive distributed systems. [Citation Graph (0, 0)][DBLP]
    EMSOFT, 2006, pp:152-160 [Conf]
  139. Arkadeb Ghosal, Alberto L. Sangiovanni-Vincentelli, Christoph M. Kirsch, Thomas A. Henzinger, Daniel T. Iercan
    A hierarchical coordination language for interacting real-time tasks. [Citation Graph (0, 0)][DBLP]
    EMSOFT, 2006, pp:132-141 [Conf]
  140. Abhijit Davare, Qi Zhu, John Moondanos, Alberto L. Sangiovanni-Vincentelli
    JPEG Encoding on the Intel MXP5800: A Platform-Based Design Case Study. [Citation Graph (0, 0)][DBLP]
    ESTImedia, 2005, pp:89-94 [Conf]
  141. Carlo H. Séquin, A. Richard Newton, Alberto L. Sangiovanni-Vincentelli
    Highlights of VLSI Research at Berkeley. [Citation Graph (0, 0)][DBLP]
    FJCC, 1986, pp:894-897 [Conf]
  142. Robert K. Brayton, Gary D. Hachtel, Alberto L. Sangiovanni-Vincentelli, Fabio Somenzi, Adnan Aziz, Szu-Tsung Cheng, Stephen A. Edwards, Sunil P. Khatri, Yuji Kukimoto, Abelardo Pardo, Shaz Qadeer, Rajeev K. Ranjan, Shaker Sarwary, Thomas R. Shiple, Gitanjali Swamy, Tiziano Villa
    VIS. [Citation Graph (0, 0)][DBLP]
    FMCAD, 1996, pp:248-256 [Conf]
  143. Jawahar Jain, Amit Narayan, C. Coelho, Sunil P. Khatri, Alberto L. Sangiovanni-Vincentelli, Robert K. Brayton, Masahiro Fujita
    Decomposition Techniques for Efficient ROBDD Construction. [Citation Graph (0, 0)][DBLP]
    FMCAD, 1996, pp:419-434 [Conf]
  144. Albert Benveniste, Benoît Caillaud, Luca P. Carloni, Paul Caspi, Alberto L. Sangiovanni-Vincentelli
    Causality and Scheduling Constraints in Heterogeneous Reactive Systems Modeling. [Citation Graph (0, 0)][DBLP]
    FMCO, 2003, pp:1-16 [Conf]
  145. Alberto L. Sangiovanni-Vincentelli
    Some Considerations on Field-Programmable Gate Arrays and Their Impact on System Design. [Citation Graph (0, 0)][DBLP]
    FPL, 1992, pp:26-34 [Conf]
  146. Massimo Baleani, Massimo Conti, Alberto Ferrari, Valerio Frascolla, Alberto L. Sangiovanni-Vincentelli
    An Enhanced POLIS Framework for Fast Exploration and Implementation of I/O Subsystems on CSoC Platforms. [Citation Graph (0, 0)][DBLP]
    FPL, 2002, pp:677-686 [Conf]
  147. Wilsin Gosti, Alberto L. Sangiovanni-Vincentelli, Tiziano Villa, Alexander Saldanha
    An Exact Input Encoding Algorithm for BDDs Representing FSMs. [Citation Graph (0, 0)][DBLP]
    Great Lakes Symposium on VLSI, 1998, pp:294-300 [Conf]
  148. Tiziano Villa, Svetlana Zharikova, Nina Yevtushenko, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli
    A new algorithm for the largest compositionally progressive solution of synchronous language equations. [Citation Graph (0, 0)][DBLP]
    ACM Great Lakes Symposium on VLSI, 2007, pp:441-444 [Conf]
  149. Mireille E. Broucke, Maria Domenica Di Benedetto, Stefano Di Gennaro, Alberto L. Sangiovanni-Vincentelli
    Optimal Control Using Bisimulations: Implementation. [Citation Graph (0, 0)][DBLP]
    HSCC, 2001, pp:175-188 [Conf]
  150. Mireille E. Broucke, Maria Domenica Di Benedetto, Alberto L. Sangiovanni-Vincentelli, Stefano Di Gennaro
    Theory of Optimal Control Using Bisimulations. [Citation Graph (0, 0)][DBLP]
    HSCC, 2000, pp:89-102 [Conf]
  151. Andrea Balluchi, Luca Benvenuti, Maria Domenica Di Benedetto, Guido M. Miconi, Ugo Pozzi, Tiziano Villa, Howard Wong-Toi, Alberto L. Sangiovanni-Vincentelli
    Maximal Safe Set Computation for Idle Speed Control of an Automotive Engine. [Citation Graph (0, 0)][DBLP]
    HSCC, 2000, pp:32-44 [Conf]
  152. Andrea Balluchi, Luca Benvenuti, Maria Domenica Di Benedetto, Alberto L. Sangiovanni-Vincentelli
    Design of Observers for Hybrid Systems. [Citation Graph (0, 0)][DBLP]
    HSCC, 2002, pp:76-89 [Conf]
  153. Andrea Balluchi, Antonio Bicchi, Emanuele Mazzi, Alberto L. Sangiovanni-Vincentelli, Gabriele Serra
    Hybrid Modelling and Control of the Common Rail Injection System. [Citation Graph (0, 0)][DBLP]
    HSCC, 2006, pp:79-92 [Conf]
  154. Andrea Balluchi, Maria Domenica Di Benedetto, Claudio Pinello, C. Rossi, Alberto L. Sangiovanni-Vincentelli
    Hybrid Control for Automotive Engine Management: The Cut-Off Case. [Citation Graph (0, 0)][DBLP]
    HSCC, 1998, pp:13-32 [Conf]
  155. Andrea Balluchi, Pierpaolo Murrieri, Alberto L. Sangiovanni-Vincentelli
    Controller Synthesis on Non-uniform and Uncertain Discrete-Time Domains. [Citation Graph (0, 0)][DBLP]
    HSCC, 2005, pp:118-133 [Conf]
  156. Andrea Balluchi, Federico Di Natale, Alberto L. Sangiovanni-Vincentelli, Jan H. van Schuppen
    Synthesis for Idle Speed Control of an Automotive Engine. [Citation Graph (0, 0)][DBLP]
    HSCC, 2004, pp:80-94 [Conf]
  157. Luigi Palopoli, Claudio Pinello, Alberto L. Sangiovanni-Vincentelli, Laurent Elghaoui, Antonio Bicchi
    Synthesis of Robust Control Systems under Resource Constraints. [Citation Graph (0, 0)][DBLP]
    HSCC, 2002, pp:337-350 [Conf]
  158. Alessandro Pinto, Luca P. Carloni, Roberto Passerone, Alberto L. Sangiovanni-Vincentelli
    Interchange Format for Hybrid Systems: Abstract Semantics. [Citation Graph (0, 0)][DBLP]
    HSCC, 2006, pp:491-506 [Conf]
  159. Alessandro Pinto, Alberto L. Sangiovanni-Vincentelli, Luca P. Carloni, Roberto Passerone
    Interchange Formats for Hybrid Systems: Review and Proposal. [Citation Graph (0, 0)][DBLP]
    HSCC, 2005, pp:526-541 [Conf]
  160. Alberto L. Sangiovanni-Vincentelli
    Models of Computation and Simulation of Hybrid Systems. [Citation Graph (0, 0)][DBLP]
    HSCC, 2000, pp:5- [Conf]
  161. Alberto L. Sangiovanni-Vincentelli, Thomas A. Henzinger, Bruce H. Krogh, Oded Maler, Manfred Morari, Costas C. Pantelides, George J. Pappas, Tunc Simsec, Janos Sztipanovits, Stavros Tripakis
    Hybrid Systems Applications: An Oxymoron? [Citation Graph (0, 0)][DBLP]
    HSCC, 2001, pp:5-6 [Conf]
  162. Andrea Balluchi, Emanuele Mazzi, Alberto L. Sangiovanni-Vincentelli
    Complexity Reduction for the Design of Interacting Controllers. [Citation Graph (0, 0)][DBLP]
    HSCC, 2007, pp:46-60 [Conf]
  163. Adnan Aziz, Vigyan Singhal, Felice Balarin, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli
    Equivalences for Fair Kripke Structures. [Citation Graph (0, 0)][DBLP]
    ICALP, 1994, pp:364-375 [Conf]
  164. Felice Balarin, Alberto L. Sangiovanni-Vincentelli
    Iterative algorithms for formal verification of embedded real-time systems. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1994, pp:450-457 [Conf]
  165. Adnan Aziz, Felice Balarin, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli
    Sequential synthesis using S1S. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1995, pp:612-617 [Conf]
  166. Alok Agrawal, Alexander Saldanha, Luciano Lavagno, Alberto L. Sangiovanni-Vincentelli
    Compact and complete test set generation for multiple stuck-faults. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1996, pp:212-219 [Conf]
  167. Mark Beardslee, Alberto L. Sangiovanni-Vincentelli
    An algorithm for improving partitions of pin-limited multi-chip systems. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1993, pp:378-385 [Conf]
  168. Fernando De Bernardinis, Alberto L. Sangiovanni-Vincentelli
    Efficient analog platform characterization through analog constraint graphs. [Citation Graph (0, 0)][DBLP]
    ICCAD, 2005, pp:415-421 [Conf]
  169. Premal Buch, Amit Narayan, A. Richard Newton, Alberto L. Sangiovanni-Vincentelli
    Logic synthesis for large pass transistor circuits. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1997, pp:663-670 [Conf]
  170. Luca P. Carloni, Patrick C. McGeer, Alexander Saldanha, Alberto L. Sangiovanni-Vincentelli
    Trace driven logic synthesis&mdashapplication to power minimization. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1997, pp:581-588 [Conf]
  171. Luca P. Carloni, Kenneth L. McMillan, Alexander Saldanha, Alberto L. Sangiovanni-Vincentelli
    A methodology for correct-by-construction latency insensitive design. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1999, pp:309-315 [Conf]
  172. Edoardo Charbon, Ranjit Gharpurey, Alberto L. Sangiovanni-Vincentelli, Robert G. Meyer
    Semi-analytical techniques for substrate characterization in the design of mixed-signal ICs. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1996, pp:455-462 [Conf]
  173. Edoardo Charbon, Paolo Miliozzi, Enrico Malavasi, Alberto L. Sangiovanni-Vincentelli
    Generalized constraint generation in the presence of non-deterministic parasitics. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1996, pp:187-192 [Conf]
  174. Edoardo Charbon, Enrico Malavasi, Alberto L. Sangiovanni-Vincentelli
    Generalized constraint generation for analog circuit design. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1993, pp:408-414 [Conf]
  175. Massimiliano Chiodo, Thomas R. Shiple, Alberto L. Sangiovanni-Vincentelli, Robert K. Brayton
    Automatic compositional minimization in CTL model checking. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1992, pp:172-178 [Conf]
  176. Umakanta Choudhury, Alberto L. Sangiovanni-Vincentelli
    Constraint-Based Channel Routing for Analog and Mixed Analog/Digital Circuits. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1990, pp:198-201 [Conf]
  177. Luca Daniel, Alberto L. Sangiovanni-Vincentelli, Jacob White
    Techniques for Including Dielectrics when Extracting Passive Low-Order Models of High Speed Interconnect. [Citation Graph (0, 0)][DBLP]
    ICCAD, 2001, pp:240-244 [Conf]
  178. Luca Daniel, Alberto L. Sangiovanni-Vincentelli, Jacob White
    Proximity templates for modeling of skin and proximity effects on packages and high frequency interconnect. [Citation Graph (0, 0)][DBLP]
    ICCAD, 2002, pp:326-333 [Conf]
  179. Alper Demir, Edward W. Y. Liu, Alberto L. Sangiovanni-Vincentelli
    Time-domain non-Monte Carlo noise simulation for nonlinear dynamic circuits with arbitrary excitations. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1994, pp:598-603 [Conf]
  180. Eric Felt, Amit Narayan, Alberto L. Sangiovanni-Vincentelli
    Measurement and modeling of MOS transistor current mismatch in analog IC's. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1994, pp:272-277 [Conf]
  181. Eric Felt, Alberto L. Sangiovanni-Vincentelli
    Testing of analog systems using behavioral models and optimal experimental design techniques. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1994, pp:672-678 [Conf]
  182. Eric Felt, Stefano Zanella, Carlo Guardiani, Alberto L. Sangiovanni-Vincentelli
    Hierarchical statistical characterization of mixed-signal circuits using behavioral modeling. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1996, pp:374-380 [Conf]
  183. Evguenii I. Goldberg, Luca P. Carloni, Tiziano Villa, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli
    Negative thinking by incremental problem solving: application to unate covering. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1997, pp:91-98 [Conf]
  184. Evguenii I. Goldberg, Tiziano Villa, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli
    A fast and robust exact algorithm for face embedding. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1997, pp:296-303 [Conf]
  185. Wilsin Gosti, Sunil P. Khatri, Alberto L. Sangiovanni-Vincentelli
    Addressing the Timing Closure Problem by Integrating Logic Optimization and Placement. [Citation Graph (0, 0)][DBLP]
    ICCAD, 2001, pp:224-231 [Conf]
  186. Wilsin Gosti, Amit Narayan, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli
    Wireplanning in logic synthesis. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1998, pp:26-33 [Conf]
  187. Gani Jusuf, Paul R. Gray, Alberto L. Sangiovanni-Vincentelli
    CADICS - Cyclic Analog-to-Digital Converter Synthesis. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1990, pp:286-289 [Conf]
  188. Kurt Keutzer, Luciano Lavagno, Alberto L. Sangiovanni-Vincentelli
    Synthesis for Testability Techniques for Asynchronous Circuits. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1991, pp:326-329 [Conf]
  189. Sunil P. Khatri, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli
    Cross-Talk Immune VLSI Design Using a Network of PLAs Embedded in a Regular Layout Fabric. [Citation Graph (0, 0)][DBLP]
    ICCAD, 2000, pp:412-418 [Conf]
  190. Desmond Kirkpatrick, Alberto L. Sangiovanni-Vincentelli
    Techniques for crosstalk avoidance in the physical design of high-performance digital systems. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1994, pp:616-619 [Conf]
  191. Desmond Kirkpatrick, Alberto L. Sangiovanni-Vincentelli
    Digital sensitivity: predicting signal interaction using functional analysis. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1996, pp:536-541 [Conf]
  192. William K. C. Lam, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli
    Valid clocking in wavepipelined circuits. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1992, pp:518-525 [Conf]
  193. Luciano Lavagno, Sharad Malik, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli
    MIS-MV: Optimization of Multi-Level Logic with Multiple-Valued Inputs. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1990, pp:560-563 [Conf]
  194. Edward A. Lee, Alberto L. Sangiovanni-Vincentelli
    Comparing models of computation. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1996, pp:234-241 [Conf]
  195. Edward W. Y. Liu, Alberto L. Sangiovanni-Vincentelli
    Behavioral simulation for noise in mixed-mode sampled-data systems. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1992, pp:322-326 [Conf]
  196. Edward W. Y. Liu, Alberto L. Sangiovanni-Vincentelli
    Nyquist data converter testing and yield analysis using behavioral simulation. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1993, pp:341-348 [Conf]
  197. Edward W. Y. Liu, Alberto L. Sangiovanni-Vincentelli, Georges G. E. Gielen, Paul R. Gray
    A Behavioral Representation for Nyquist Rate A/D Converters. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1991, pp:386-389 [Conf]
  198. Linda Milor, Alberto L. Sangiovanni-Vincentelli
    Computing Parametric Yield Accurately and Efficiently. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1990, pp:116-119 [Conf]
  199. Linda Milor, Alberto L. Sangiovanni-Vincentelli
    Optimal Test Set Design for Analog Circuits. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1990, pp:294-297 [Conf]
  200. Enrico Malavasi, Umakanta Choudhury, Alberto L. Sangiovanni-Vincentelli
    A Routing Methodology for Analog Integrated Circuits. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1990, pp:202-205 [Conf]
  201. Sharad Malik, Kanwar Jit Singh, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli
    Performance Optimization of Pipelined Circuits. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1990, pp:410-413 [Conf]
  202. Radu Marculescu, Amit Nandi, Luciano Lavagno, Alberto L. Sangiovanni-Vincentelli
    System-Level Power/Performance Analysis of Portable Multimedia Systems Communicating over Wireless Channels. [Citation Graph (0, 0)][DBLP]
    ICCAD, 2001, pp:207-0 [Conf]
  203. Amit Mehrotra, Shaz Qadeer, Vigyan Singhal, Robert K. Brayton, Adnan Aziz, Alberto L. Sangiovanni-Vincentelli
    Sequential optimisation without state space exploration. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1997, pp:208-215 [Conf]
  204. Amit Mehrotra, Alberto L. Sangiovanni-Vincentelli
    Noise analysis of non-autonomous radio frequency circuits. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1999, pp:55-60 [Conf]
  205. Patrick C. McGeer, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli, Sartaj Sahni
    Performance Enhancement through the Generalized Bypass Transform. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1991, pp:184-187 [Conf]
  206. Patrick C. McGeer, Kenneth L. McMillan, Alexander Saldanha, Alberto L. Sangiovanni-Vincentelli, Patrick Scaglia
    Fast discrete function evaluation using decision diagrams. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1995, pp:402-407 [Conf]
  207. Patrick C. McGeer, Alexander Saldanha, Paul R. Stephan, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli
    Timing Analysis and Delay-Fault Test Generation using Path-Recursive Functions. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1991, pp:180-183 [Conf]
  208. Rajeev Murgai, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli
    On Clustering for Minimum Delay/Area. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1991, pp:6-9 [Conf]
  209. Rajeev Murgai, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli
    Cube-packing and two-level minimization. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1993, pp:115-122 [Conf]
  210. Rajeev Murgai, Narendra V. Shenoy, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli
    Improved Logic Synthesis Algorithms for Table Look Up Architectures. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1991, pp:564-567 [Conf]
  211. Rajeev Murgai, Narendra V. Shenoy, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli
    Performance Directed Synthesis for Table Look Up Programmable Gate Arrays. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1991, pp:572-575 [Conf]
  212. Amit Narayan, Adrian J. Isles, Jawahar Jain, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli
    Reachability analysis using partitioned-ROBDDs. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1997, pp:388-393 [Conf]
  213. Amit Narayan, Jawahar Jain, Masahiro Fujita, Alberto L. Sangiovanni-Vincentelli
    Partitioned ROBDDs - a compact, canonical and efficiently manipulable representation for Boolean functions. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1996, pp:547-554 [Conf]
  214. Alessandra Nardi, Haibo Zeng, Joshua L. Garrett, Luca Daniel, Alberto L. Sangiovanni-Vincentelli
    A Methodology for the Computation of an Upper Bound on Nose Current Spectrum of CMOS Switching Activity. [Citation Graph (0, 0)][DBLP]
    ICCAD, 2003, pp:778-785 [Conf]
  215. Arlindo L. Oliveira, Alberto L. Sangiovanni-Vincentelli
    LSAT-An Algorithm for the Synthesis of Two Level Threshold Gate Networks. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1991, pp:130-133 [Conf]
  216. Roberto Passerone, Luca de Alfaro, Thomas A. Henzinger, Alberto L. Sangiovanni-Vincentelli
    Convertibility verification and converter synthesis: two faces of the same coin. [Citation Graph (0, 0)][DBLP]
    ICCAD, 2002, pp:132-139 [Conf]
  217. Alexander Saldanha, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli, Kwang-Ting Cheng
    Timing Optimization with Testability Considerations. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1990, pp:460-463 [Conf]
  218. Narendra V. Shenoy, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli
    Graph algorithms for clock schedule optimization. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1992, pp:132-136 [Conf]
  219. Narendra V. Shenoy, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli
    Minimum padding to satisfy short path constraints. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1993, pp:156-161 [Conf]
  220. Iasson Vassiliou, Henry Chang, Alper Demir, Edoardo Charbon, Paolo Miliozzi, Alberto L. Sangiovanni-Vincentelli
    A video driver system designed using a top-down, constraint-driven methodology. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1996, pp:463-468 [Conf]
  221. Hervé J. Touati, Hamid Savoj, Bill Lin, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli
    Implicit State Enumeration of Finite State Machines Using BDDs. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1990, pp:130-133 [Conf]
  222. Alexandre Yakovlev, Luciano Lavagno, Alberto L. Sangiovanni-Vincentelli
    A unified signal transition graph model for asynchronous control circuit synthesis. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1992, pp:104-111 [Conf]
  223. Nina Yevtushenko, Tiziano Villa, Robert K. Brayton, Alexandre Petrenko, Alberto L. Sangiovanni-Vincentelli
    Solution of Parallel Language Equations for Logic Synthesis. [Citation Graph (0, 0)][DBLP]
    ICCAD, 2001, pp:103-0 [Conf]
  224. A. Fazzi, L. Magagni, M. De Dominicis, P. Zoffoli, Roberto Canegallo, Pier Luigi Rolandi, Alberto L. Sangiovanni-Vincentelli, Roberto Guerrieri
    Yield prediction for 3D capacitive interconnections. [Citation Graph (0, 0)][DBLP]
    ICCAD, 2006, pp:809-814 [Conf]
  225. Fernando De Bernardinis, Pierluigi Nuzzo, Alberto L. Sangiovanni-Vincentelli
    Robust system level design with analog platforms. [Citation Graph (0, 0)][DBLP]
    ICCAD, 2006, pp:334-341 [Conf]
  226. Paolo Giusto, Jean-Yves Brunel, Alberto Ferrari, Eliane Fourgeau, Luciano Lavagno, Barry O'Rourke, Alberto L. Sangiovanni-Vincentelli, Emanuele Guasto
    Models of IP's for Automotive Virtual Integration Platforms. [Citation Graph (0, 0)][DBLP]
    ICCD, 2002, pp:379-0 [Conf]
  227. Paolo Giusto, Jean-Yves Brunel, Alberto Ferrari, Eliane Fourgeau, Luciano Lavagno, Alberto L. Sangiovanni-Vincentelli
    Automotive Virtual Integration Platforms: Why's, What's, and How's. [Citation Graph (0, 0)][DBLP]
    ICCD, 2002, pp:370-378 [Conf]
  228. Alberto Ferrari, Alberto L. Sangiovanni-Vincentelli
    System Design: Traditional Concepts and New Paradigms. [Citation Graph (0, 0)][DBLP]
    ICCD, 1999, pp:2-13 [Conf]
  229. Jawahar Jain, Amit Narayan, Masahiro Fujita, Alberto L. Sangiovanni-Vincentelli
    A Survey of Techniques for Formal Verification of Combinational Circuits. [Citation Graph (0, 0)][DBLP]
    ICCD, 1997, pp:445-454 [Conf]
  230. Timothy Kam, Tiziano Villa, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli
    Implicit state minimization of non-deterministic FSMs. [Citation Graph (0, 0)][DBLP]
    ICCD, 1995, pp:250-257 [Conf]
  231. Luciano Lavagno, Alberto L. Sangiovanni-Vincentelli
    Linear Programming for Optimum Hazard Elimination in Asynchronous Circuits. [Citation Graph (0, 0)][DBLP]
    ICCD, 1992, pp:275-278 [Conf]
  232. Rajeev Murgai, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli
    Some Results on the Complexity of Boolean Functions for Table Look Up Architectures. [Citation Graph (0, 0)][DBLP]
    ICCD, 1993, pp:505-512 [Conf]
  233. Rajeev K. Ranjan, Wilsin Gosti, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli
    Dynamic Reordering in a Breadth-First Manipulation Based BDD Package: Challenges and Solutions. [Citation Graph (0, 0)][DBLP]
    ICCD, 1997, pp:344-351 [Conf]
  234. Rajeev K. Ranjan, Jagesh V. Sanghavi, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli
    Binary decision diagrams on network of workstation. [Citation Graph (0, 0)][DBLP]
    ICCD, 1996, pp:358-364 [Conf]
  235. Alessandro Pinto, Luca P. Carloni, Alberto L. Sangiovanni-Vincentelli
    Efficient Synthesis of Networks On Chip. [Citation Graph (0, 0)][DBLP]
    ICCD, 2003, pp:146-150 [Conf]
  236. Ellen Sentovich, Kanwar Jit Singh, Cho W. Moon, Hamid Savoj, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli
    Sequential Circuit Design Using Synthesis and Optimization. [Citation Graph (0, 0)][DBLP]
    ICCD, 1992, pp:328-333 [Conf]
  237. Narendra V. Shenoy, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli
    Retiming of Circuits with Single Phase Transparent Latches. [Citation Graph (0, 0)][DBLP]
    ICCD, 1991, pp:86-89 [Conf]
  238. Subarnarekha Sinha, Sunil P. Khatri, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli
    Binary and Multi-Valued SPFD-Based Wire Removal in PLA Networks. [Citation Graph (0, 0)][DBLP]
    ICCD, 2000, pp:494-503 [Conf]
  239. Guoqiang Wang, Andreas Kuehlmann, Alberto L. Sangiovanni-Vincentelli
    Structural Detection of Symmetries in Boolean Functions. [Citation Graph (0, 0)][DBLP]
    ICCD, 2003, pp:498-503 [Conf]
  240. Arlindo L. Oliveira, Alberto L. Sangiovanni-Vincentelli
    Learning Concepts by Synthesizing Minimal Threshold Gate Networks. [Citation Graph (0, 0)][DBLP]
    ML, 1991, pp:193-197 [Conf]
  241. Arlindo L. Oliveira, Alberto L. Sangiovanni-Vincentelli
    Constructive Induction Using a Non-Greedy Strategy for Feature Selection. [Citation Graph (0, 0)][DBLP]
    ML, 1992, pp:355-360 [Conf]
  242. Arlindo L. Oliveira, Alberto L. Sangiovanni-Vincentelli
    Inferring Reduced Ordered Decision Graphs of Minimum Description Length. [Citation Graph (0, 0)][DBLP]
    ICML, 1995, pp:421-429 [Conf]
  243. Alberto L. Sangiovanni-Vincentelli
    Design Methods and Tools for Application Specific Integrated Circuits. [Citation Graph (0, 0)][DBLP]
    IFIP Congress, 1989, pp:903- [Conf]
  244. Luciano Lavagno, Alberto L. Sangiovanni-Vincentelli
    Automated Synthesis of Asynchronous Interface Circuits. [Citation Graph (0, 0)][DBLP]
    Asynchronous Design Methodologies, 1993, pp:107-121 [Conf]
  245. Luca P. Carloni, Evguenii I. Goldberg, Tiziano Villa, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli
    Aura II: Combining Negative Thinking and Branch-and-Bound in Unate Covering Problems. [Citation Graph (0, 0)][DBLP]
    VLSI, 1999, pp:346-361 [Conf]
  246. Alberto L. Sangiovanni-Vincentelli, Marco Somalvico
    State-Space Approach in Problem-solving Optimization. [Citation Graph (0, 0)][DBLP]
    Optimization Techniques, 1973, pp:144-158 [Conf]
  247. Fernando De Bernardinis, Pierluigi Nuzzo, Pierangelo Terreni, Alberto L. Sangiovanni-Vincentelli
    Enriching an analog platform for analog-to-digital converter design. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 2005, pp:1286-1289 [Conf]
  248. Alberto L. Sangiovanni-Vincentelli, Marco Re, Luciano Lavagno, Gian-Carlo Cardarilli, Roberto Lojacono
    Analysis of the quantization noise effects on the SQNR behaviour in analog to digital conversion. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:334-338 [Conf]
  249. Farinaz Koushanfar, Abhijit Davare, Dai Tho Nguyen, Miodrag Potkonjak, Alberto L. Sangiovanni-Vincentelli
    Low power coordination in wireless ad-hoc networks. [Citation Graph (0, 0)][DBLP]
    ISLPED, 2003, pp:475-480 [Conf]
  250. Alberto L. Sangiovanni-Vincentelli
    Platform-Based Design: A Path to Efficient Design Re-Use. [Citation Graph (0, 0)][DBLP]
    ISQED, 2000, pp:209-210 [Conf]
  251. Stefano Zanella, Andrea Neviani, Enrico Zanoni, Paolo Miliozzi, Edoardo Charbon, Carlo Guardiani, Luca P. Carloni, Alberto L. Sangiovanni-Vincentelli
    Modeling of Substrate Noise Injected by Digital Libraries. [Citation Graph (0, 0)][DBLP]
    ISQED, 2001, pp:488-0 [Conf]
  252. Enrica Filippi, Luciano Lavagno, L. Licciardi, A. Montanaro, M. Paolini, Roberto Passerone, Marco Sgroi, Alberto L. Sangiovanni-Vincentelli
    Intellectual Property Re-use in Embedded System Co-design: An Industrial Case Study. [Citation Graph (0, 0)][DBLP]
    ISSS, 1998, pp:37-42 [Conf]
  253. Srinivas Devadas, Hi-Keung Tony Ma, A. Richard Newton, Alberto L. Sangiovanni-Vincentelli
    Synthesis and Optimization Procedures for Fully and Easily Testable Sequential Machines. [Citation Graph (0, 0)][DBLP]
    ITC, 1988, pp:621-630 [Conf]
  254. Hi-Keung Tony Ma, A. Richard Newton, Srinivas Devadas, Alberto L. Sangiovanni-Vincentelli
    An Incomplete Scan Design Approach to Test Generation for Sequential Machines. [Citation Graph (0, 0)][DBLP]
    ITC, 1988, pp:730-734 [Conf]
  255. Ion M. Ratiu, Alberto L. Sangiovanni-Vincentelli, Donald O. Pederson
    VICTOR : A Fast VLSI Testability Analysis Program. [Citation Graph (0, 0)][DBLP]
    ITC, 1982, pp:397-403 [Conf]
  256. Alberto L. Sangiovanni-Vincentelli
    Optimal Logic Synthesis and Testability : Two Sides of the Same Coin. [Citation Graph (0, 0)][DBLP]
    ITC, 1988, pp:3-12 [Conf]
  257. Alberto L. Sangiovanni-Vincentelli, Ruey-Sing Wei
    PROTEUS : A Logic Verification System for Combinational Circuits. [Citation Graph (0, 0)][DBLP]
    ITC, 1986, pp:350-359 [Conf]
  258. Ruey-Sing Wei, Alberto L. Sangiovanni-Vincentelli
    New Front-End and Line Justification Algorithm for Automatic Test Generation. [Citation Graph (0, 0)][DBLP]
    ITC, 1986, pp:121-128 [Conf]
  259. Nina Yevtushenko, Tiziano Villa, Robert K. Brayton, Alexandre Petrenko, Alberto L. Sangiovanni-Vincentelli
    Equisolvability of Series vs. Controller's Topology in Synchronous Language Equations. [Citation Graph (0, 0)][DBLP]
    IWLS, 2002, pp:45-50 [Conf]
  260. Felice Balarin, Claudio Passerone, Alessandro Pinto, Alberto L. Sangiovanni-Vincentelli
    A formal approach to system level design: metamodels and unified design environments. [Citation Graph (0, 0)][DBLP]
    MEMOCODE, 2005, pp:155-163 [Conf]
  261. Antonia Bertolino, Alvise Bonivento, Guglielmo De Angelis, Alberto L. Sangiovanni-Vincentelli
    Modeling and Early Performance Estimation for Network Processor Applications. [Citation Graph (0, 0)][DBLP]
    MoDELS, 2006, pp:753-767 [Conf]
  262. Alan H. Kramer, Alberto L. Sangiovanni-Vincentelli
    Efficient Parallel Learning Algorithms for Neural Networks. [Citation Graph (0, 0)][DBLP]
    NIPS, 1988, pp:40-48 [Conf]
  263. Arlindo L. Oliveira, Alberto L. Sangiovanni-Vincentelli
    Learning Complex Boolean Functions: Algorithms and Applications. [Citation Graph (0, 0)][DBLP]
    NIPS, 1993, pp:911-918 [Conf]
  264. Marco Di Natale, Alberto L. Sangiovanni-Vincentelli, Felice Balarin
    Scheduling Reactive Task Graphs in Embedded Control Systems. [Citation Graph (0, 0)][DBLP]
    IEEE Real Time Technology and Applications Symposium, 2001, pp:191-0 [Conf]
  265. Leonardo Mangeruca, Alberto Ferrari, Alberto L. Sangiovanni-Vincentelli
    Uniprocessor Scheduling Under Precedence Constraints. [Citation Graph (0, 0)][DBLP]
    IEEE Real Time Technology and Applications Symposium, 2006, pp:157-166 [Conf]
  266. Alberto L. Sangiovanni-Vincentelli
    Embedded Software Design for Real-Time Applications. [Citation Graph (0, 0)][DBLP]
    IEEE Real-Time Systems Symposium, 2001, pp:- [Conf]
  267. Luca P. Carloni, Alberto L. Sangiovanni-Vincentelli
    Combining Retiming and Recycling to Optimize the Performance of Synchronous Circuits. [Citation Graph (0, 0)][DBLP]
    SBCCI, 2003, pp:47-52 [Conf]
  268. Eric Tomacruz, Jagesh V. Sanghavi, Alberto L. Sangiovanni-Vincentelli
    A parallel iterative linear solver for solving irregular grid semiconductor device matrices. [Citation Graph (0, 0)][DBLP]
    SC, 1994, pp:24-33 [Conf]
  269. Sunil P. Khatri, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli
    Sequential Multi-Valued Network Simplification using Redundancy Removal. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 1999, pp:206-211 [Conf]
  270. Jawahar Jain, Amit Narayan, Masahiro Fujita, Alberto L. Sangiovanni-Vincentelli
    Formal Verification of Combinational Circuit. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 1997, pp:218-225 [Conf]
  271. Patrick C. McGeer, Jagesh V. Sanghavi, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli
    Minimization of Logic Functions Using Essential Signature Sets. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 1993, pp:323-328 [Conf]
  272. Amit Narayan, Sunil P. Khatri, Jawahar Jain, Masahiro Fujita, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli
    A study of composition schemes for mixed apply/compose based construction of ROBDDs. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 1996, pp:249-253 [Conf]
  273. Alexander Saldanha, Narendra V. Shenoy, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli
    Functional clock schedule optimization. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 1995, pp:93-98 [Conf]
  274. Alberto L. Sangiovanni-Vincentelli
    Reasoning about the Trends and Challenges of Engineering Design Automation. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2007, pp:28-30 [Conf]
  275. Eric Felt, Alberto L. Sangiovanni-Vincentelli
    Optimization of analog IC test structures. [Citation Graph (0, 0)][DBLP]
    VTS, 1996, pp:48-53 [Conf]
  276. Fabio Romeo, Alberto L. Sangiovanni-Vincentelli
    A Theoretical Framework for Simulated Annealing. [Citation Graph (0, 0)][DBLP]
    Algorithmica, 1991, v:6, n:3, pp:302-345 [Journal]
  277. Alberto L. Sangiovanni-Vincentelli
    Editor's Foreword. [Citation Graph (0, 0)][DBLP]
    Algorithmica, 1991, v:6, n:3, pp:295-301 [Journal]
  278. Felice Balarin, Yosinori Watanabe, Harry Hsieh, Luciano Lavagno, Claudio Passerone, Alberto L. Sangiovanni-Vincentelli
    Metropolis: An Integrated Electronic System Design Environment. [Citation Graph (0, 0)][DBLP]
    IEEE Computer, 2003, v:36, n:4, pp:45-52 [Journal]
  279. Arnon Amir, Lior Zimet, Alberto L. Sangiovanni-Vincentelli, Sean Kao
    An embedded system for an eye-detection sensor. [Citation Graph (0, 0)][DBLP]
    Computer Vision and Image Understanding, 2005, v:98, n:1, pp:104-123 [Journal]
  280. Felice Balarin, Luciano Lavagno, Praveen K. Murthy, Alberto L. Sangiovanni-Vincentelli
    Scheduling for Embedded Real-Time Systems. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 1998, v:15, n:1, pp:71-82 [Journal]
  281. Alessandra Nardi, Alberto L. Sangiovanni-Vincentelli
    Logic Synthesis for Manufacturability. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2004, v:21, n:3, pp:192-199 [Journal]
  282. Marco Sgroi, Luciano Lavagno, Alberto L. Sangiovanni-Vincentelli
    Formal Models for Embedded System Design. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2000, v:17, n:2, pp:14-27 [Journal]
  283. Alberto L. Sangiovanni-Vincentelli
    DAC Turns 40! [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2003, v:20, n:3, pp:90-96 [Journal]
  284. Alberto L. Sangiovanni-Vincentelli
    The Tides of EDA. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2003, v:20, n:6, pp:59-75 [Journal]
  285. Alberto L. Sangiovanni-Vincentelli
    The importance of innovation in the economy of advanced countries. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2005, v:22, n:1, pp:14-16 [Journal]
  286. Alberto L. Sangiovanni-Vincentelli, Grant Martin
    Platform-Based Design and Software Design Methodology for Embedded Systems. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2001, v:18, n:6, pp:23-33 [Journal]
  287. Adnan Aziz, Thomas R. Shiple, Vigyan Singhal, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli
    Formula-Dependent Equivalence for Compositional CTL Model Checking. [Citation Graph (0, 0)][DBLP]
    Formal Methods in System Design, 2002, v:21, n:2, pp:193-224 [Journal]
  288. Felice Balarin, Alberto L. Sangiovanni-Vincentelli
    An Iterative Approach to Verification of Real-Time Systems. [Citation Graph (0, 0)][DBLP]
    Formal Methods in System Design, 1995, v:6, n:1, pp:67-95 [Journal]
  289. Alexandre Yakovlev, Luciano Lavagno, Alberto L. Sangiovanni-Vincentelli
    A Unified Signal Transition Graph Model for Asynchronous Control Circuit Synthesis. [Citation Graph (0, 0)][DBLP]
    Formal Methods in System Design, 1996, v:9, n:3, pp:139-188 [Journal]
  290. Luca P. Carloni, Alberto L. Sangiovanni-Vincentelli
    A Framework for Modeling the Distributed Deployment of Synchronous Designs. [Citation Graph (0, 0)][DBLP]
    Formal Methods in System Design, 2006, v:28, n:2, pp:93-110 [Journal]
  291. Maria Domenica Di Benedetto, Pasquale Lucibello, Alberto L. Sangiovanni-Vincentelli, K. Yamaguchi
    A new procedure for exact ring closure. [Citation Graph (0, 0)][DBLP]
    Journal of Computational Chemistry, 2000, v:21, n:10, pp:870-881 [Journal]
  292. Luca P. Carloni, Alberto L. Sangiovanni-Vincentelli
    Coping with Latency in SOC Design. [Citation Graph (0, 0)][DBLP]
    IEEE Micro, 2002, v:22, n:5, pp:24-35 [Journal]
  293. Alberto L. Sangiovanni-Vincentelli
    Electronic-System Design in the Automobile Industry. [Citation Graph (0, 0)][DBLP]
    IEEE Micro, 2003, v:23, n:3, pp:8-18 [Journal]
  294. Alberto L. Sangiovanni-Vincentelli, Luciano Lavagno
    Guest Editors' Introduction: Trends and Directions in Microelectronics. [Citation Graph (0, 0)][DBLP]
    IEEE Micro, 2003, v:23, n:3, pp:6-7 [Journal]
  295. Arlindo L. Oliveira, Alberto L. Sangiovanni-Vincentelli
    Using the Minimum Description Length Principle to Infer Reduced Ordered Decision Graphs. [Citation Graph (0, 0)][DBLP]
    Machine Learning, 1996, v:25, n:1, pp:23-50 [Journal]
  296. Alvise Bonivento, Luca P. Carloni, Alberto L. Sangiovanni-Vincentelli
    Platform based design for wireless sensor networks. [Citation Graph (0, 0)][DBLP]
    MONET, 2006, v:11, n:4, pp:469-485 [Journal]
  297. Benjamin Horowitz, Judith Liebman, Cedric Ma, Tak-John Koo, Alberto L. Sangiovanni-Vincentelli, Shankar Sastry
    Platform-based embedded software design and system integration for autonomous vehicles. [Citation Graph (0, 0)][DBLP]
    Proceedings of the IEEE, 2003, v:91, n:1, pp:198-211 [Journal]
  298. Abdul A. Malik, Robert K. Brayton, A. Richard Newton, Alberto L. Sangiovanni-Vincentelli
    Two-Level Minimization of Multivalued Functions with Large Offsets. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1993, v:42, n:11, pp:1325-1342 [Journal]
  299. Arlindo L. Oliveira, Luca P. Carloni, Tiziano Villa, Alberto L. Sangiovanni-Vincentelli
    Exact Minimization of Binary Decision Diagrams Using Implicit Techniques. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1998, v:47, n:11, pp:1282-1296 [Journal]
  300. Richard Saeks, Alberto L. Sangiovanni-Vincentelli, V. Visvanathan
    Diagnosability of Nonlinear Circuits and Systems - Part II: Dynamical Systems. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1981, v:30, n:11, pp:899-904 [Journal]
  301. V. Visvanathan, Alberto L. Sangiovanni-Vincentelli
    Diagnosability of Nonlinear Circuits and Systems - Part I: The dc Case. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1981, v:30, n:11, pp:889-898 [Journal]
  302. Adnan Aziz, Felice Balarin, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli
    Sequential synthesis using S1S. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 2000, v:19, n:10, pp:1149-1162 [Journal]
  303. Felice Balarin, Massimiliano Chiodo, Paolo Giusto, Harry Hsieh, Attila Jurecska, Luciano Lavagno, Alberto L. Sangiovanni-Vincentelli, Ellen Sentovich, Kei Suzuki
    Synthesis of software programs for embedded control applications. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1999, v:18, n:6, pp:834-849 [Journal]
  304. Karen A. Bartlett, Robert K. Brayton, Gary D. Hachtel, Reily M. Jacoby, Christopher R. Morrison, Richard L. Rudell, Alberto L. Sangiovanni-Vincentelli, Albert R. Wang
    Multi-level logic minimization using implicit don't cares. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1988, v:7, n:6, pp:723-740 [Journal]
  305. Douglas Braun, Jeffrey L. Burns, Fabio Romeo, Alberto L. Sangiovanni-Vincentelli, Kartikeya Mayaram, Srinivas Devadas, Hi-Keung Tony Ma
    Techniques for multilayer channel routing. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1988, v:7, n:6, pp:698-712 [Journal]
  306. Robert K. Brayton, Richard L. Rudell, Alberto L. Sangiovanni-Vincentelli, Albert R. Wang
    MIS: A Multiple-Level Logic Optimization System. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1987, v:6, n:6, pp:1062-1081 [Journal]
  307. Luca P. Carloni, Kenneth L. McMillan, Alberto L. Sangiovanni-Vincentelli
    Theory of latency-insensitive design. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 2001, v:20, n:9, pp:1059-1076 [Journal]
  308. Giorgio Casinovi, Alberto L. Sangiovanni-Vincentelli
    A new aggregation technique for the solution of large systems of algebraic equations [IC simulation]. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1988, v:7, n:9, pp:976-986 [Journal]
  309. Giorgio Casinovi, Alberto L. Sangiovanni-Vincentelli
    A macromodeling algorithm for analog circuits. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1991, v:10, n:2, pp:150-160 [Journal]
  310. Andrea Casotto, Fabio Romeo, Alberto L. Sangiovanni-Vincentelli
    A Parallel Simulated Annealing Algorithm for the Placement of Macro-Cells. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1987, v:6, n:5, pp:838-847 [Journal]
  311. Andrea Casotto, Alberto L. Sangiovanni-Vincentelli
    Automated design management using traces. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1993, v:12, n:8, pp:1077-1095 [Journal]
  312. Edoardo Charbon, Ranjit Gharpurey, Robert G. Meyer, Alberto L. Sangiovanni-Vincentelli
    Substrate optimization based on semi-analytical techniques. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1999, v:18, n:2, pp:172-190 [Journal]
  313. Edoardo Charbon, Paolo Miliozzi, Luca P. Carloni, Alberto Ferrari, Alberto L. Sangiovanni-Vincentelli
    Modeling digital substrate noise injection in mixed-signal IC's. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1999, v:18, n:3, pp:301-310 [Journal]
  314. Umakanta Choudhury, Alberto L. Sangiovanni-Vincentelli
    Automatic generation of parasitic constraints for performance-constrained physical design of analog circuits. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1993, v:12, n:2, pp:208-224 [Journal]
  315. Umakanta Choudhury, Alberto L. Sangiovanni-Vincentelli
    Constraint-based channel routing for analog and mixed analog/digital circuits. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1993, v:12, n:4, pp:497-510 [Journal]
  316. Umakanta Choudhury, Alberto L. Sangiovanni-Vincentelli
    Automatic generation of analytical models for interconnect capacitances. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1995, v:14, n:4, pp:470-480 [Journal]
  317. Alper Demir, Edward W. Y. Liu, Alberto L. Sangiovanni-Vincentelli
    Time-domain non-Monte Carlo noise simulation for nonlinear dynamic circuits with arbitrary excitations. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1996, v:15, n:5, pp:493-505 [Journal]
  318. Srinivas Devadas, Hi-Keung Tony Ma, A. Richard Newton, Alberto L. Sangiovanni-Vincentelli
    MUSTANG: state assignment of finite state machines targeting multilevel logic implementations. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1988, v:7, n:12, pp:1290-1300 [Journal]
  319. Srinivas Devadas, Hi-Keung Tony Ma, A. Richard Newton, Alberto L. Sangiovanni-Vincentelli
    A synthesis and optimization procedure for fully and easily testable sequential machines. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1989, v:8, n:10, pp:1100-1107 [Journal]
  320. Srinivas Devadas, Hi-Keung Tony Ma, A. Richard Newton, Alberto L. Sangiovanni-Vincentelli
    Irredundant sequential machines via optimal logic synthesis. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1990, v:9, n:1, pp:8-18 [Journal]
  321. Evguenii I. Goldberg, Luca P. Carloni, Tiziano Villa, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli
    Negative thinking in branch-and-bound: the case of unate covering. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 2000, v:19, n:3, pp:281-294 [Journal]
  322. Evguenii I. Goldberg, Tiziano Villa, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli
    Theory and algorithms for face hypercube embedding. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1998, v:17, n:6, pp:472-488 [Journal]
  323. Roberto Guerrieri, Alberto L. Sangiovanni-Vincentelli
    Three-dimensional capacitance evaluation on a Connection Machine. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1988, v:7, n:11, pp:1125-1133 [Journal]
  324. Gary D. Hachtel, A. Richard Newton, Alberto L. Sangiovanni-Vincentelli
    An Algorithm for Optimal PLA Folding. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1982, v:1, n:2, pp:63-77 [Journal]
  325. Harry Hsieh, Felice Balarin, Luciano Lavagno, Alberto L. Sangiovanni-Vincentelli
    Synchronous approach to the functional equivalence of embeddedsystem implementations. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 2001, v:20, n:8, pp:1016-1033 [Journal]
  326. Kurt Keutzer, Luciano Lavagno, Alberto L. Sangiovanni-Vincentelli
    Synthesis for testability techniques for asynchronous circuits. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1995, v:14, n:12, pp:1569-1577 [Journal]
  327. Kurt Keutzer, A. Richard Newton, Jan M. Rabaey, Alberto L. Sangiovanni-Vincentelli
    System-level design: orthogonalization of concerns andplatform-based design. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 2000, v:19, n:12, pp:1523-1543 [Journal]
  328. Sunil P. Khatri, Subarnarekha Sinha, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli
    SPFD-based wire removal in standard-cell and network-of-PLA circuits. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 2004, v:23, n:7, pp:1020-1030 [Journal]
  329. Timothy Kam, Tiziano Villa, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli
    Implicit computation of compatible sets for state minimization of ISFSMs. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1997, v:16, n:7, pp:657-676 [Journal]
  330. Timothy Kam, Tiziano Villa, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli
    Theory and algorithms for state minimization of nondeterministic FSMs. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1997, v:16, n:11, pp:1311-1322 [Journal]
  331. William K. C. Lam, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli
    Valid clock frequencies and their computation in wavepipelined circuits. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1996, v:15, n:7, pp:791-807 [Journal]
  332. William K. Lam, Alexander Saldanha, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli
    Delay fault coverage, test set size, and performance trade-offs. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1995, v:14, n:1, pp:32-44 [Journal]
  333. Luciano Lavagno, Kurt Keutzer, Alberto L. Sangiovanni-Vincentelli
    Synthesis of hazard-free asynchronous circuits with bounded wire delays. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1995, v:14, n:1, pp:61-86 [Journal]
  334. Luciano Lavagno, Cho W. Moon, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli
    An efficient heuristic procedure for solving the state assignment problem for event-based specifications. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1995, v:14, n:1, pp:45-60 [Journal]
  335. Kenneth S. Kundert, Alberto L. Sangiovanni-Vincentelli
    Simulation of Nonlinear Circuits in the Frequency Domain. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1986, v:5, n:4, pp:521-535 [Journal]
  336. Edward A. Lee, Alberto L. Sangiovanni-Vincentelli
    A framework for comparing models of computation. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1998, v:17, n:12, pp:1217-1229 [Journal]
  337. Ekachai Lelarasmee, Albert E. Ruehli, Alberto L. Sangiovanni-Vincentelli
    The Waveform Relaxation Method for Time-Domain Analysis of Large Scale Integrated Circuits. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1982, v:1, n:3, pp:131-145 [Journal]
  338. Edward W. Y. Liu, Alberto L. Sangiovanni-Vincentelli
    Verification of Nyquist data converters using behavioral simulation. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1995, v:14, n:4, pp:493-502 [Journal]
  339. Hi-Keung Tony Ma, Srinivas Devadas, A. Richard Newton, Alberto L. Sangiovanni-Vincentelli
    Test generation for sequential circuits. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1988, v:7, n:10, pp:1081-1093 [Journal]
  340. Hi-Keung Tony Ma, Srinivas Devadas, Ruey-Sing Wei, Alberto L. Sangiovanni-Vincentelli
    Logic verification algorithms and their parallel implementation. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1989, v:8, n:2, pp:181-189 [Journal]
  341. Enrico Malavasi, Edoardo Charbon, Eric Felt, Alberto L. Sangiovanni-Vincentelli
    Automation of IC layout with analog constraints. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1996, v:15, n:8, pp:923-942 [Journal]
  342. Enrico Malavasi, Alberto L. Sangiovanni-Vincentelli
    Area routing for analog layout. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1993, v:12, n:8, pp:1186-1197 [Journal]
  343. Abdul A. Malik, Robert K. Brayton, A. Richard Newton, Alberto L. Sangiovanni-Vincentelli
    Reduced offsets for minimization of binary-valued functions. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1991, v:10, n:4, pp:413-426 [Journal]
  344. Sharad Malik, Luciano Lavagno, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli
    Symbolic minimization of multilevel logic and the input encoding problem. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1992, v:11, n:7, pp:825-843 [Journal]
  345. Sharad Malik, Ellen M. Sentovich, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli
    Retiming and resynthesis: optimizing sequential networks with combinational techniques. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1991, v:10, n:1, pp:74-84 [Journal]
  346. Sharad Malik, Kanwar Jit Singh, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli
    Performance optimization of pipelined logic circuits using peripheral retiming and resynthesis. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1993, v:12, n:5, pp:568-578 [Journal]
  347. Giovanni De Micheli, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli
    Optimal State Assignment for Finite State Machines. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1985, v:4, n:3, pp:269-285 [Journal]
  348. Giovanni De Micheli, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli
    Correction to "Optimal State Assignment for Finite State Machines". [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1986, v:5, n:1, pp:239-239 [Journal]
  349. Giovanni De Micheli, A. Richard Newton, Alberto L. Sangiovanni-Vincentelli
    Symmetric Displacement Algorithms for the Timing Analysis of Large Scale Circuits. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1983, v:2, n:3, pp:167-180 [Journal]
  350. Giovanni De Micheli, Alberto L. Sangiovanni-Vincentelli
    Multiple Constrained Folding of Programmable Logic Arrays: Theory and Applications. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1983, v:2, n:3, pp:151-167 [Journal]
  351. Giovanni De Micheli, Alberto L. Sangiovanni-Vincentelli
    Correction to "Multiple Constrained Folding of Programmable Logic Arrays: Theory and Applications". [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1984, v:3, n:3, pp:256-256 [Journal]
  352. Linda S. Milor, Alberto L. Sangiovanni-Vincentelli
    Minimizing production test time to detect faults in analog circuits. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1994, v:13, n:6, pp:796-813 [Journal]
  353. A. Richard Newton, Alberto L. Sangiovanni-Vincentelli
    Relaxation-Based Electrical Simulation. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1984, v:3, n:4, pp:308-331 [Journal]
  354. William Nye, David C. Riley, Alberto L. Sangiovanni-Vincentelli, André L. Tits
    DELIGHT.SPICE: an optimization-based system for the design of integrated circuits. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1988, v:7, n:4, pp:501-519 [Journal]
  355. James Reed, Alberto L. Sangiovanni-Vincentelli, Mauro Santomauro
    A New Symbolic Channel Router: YACR2. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1985, v:4, n:3, pp:208-219 [Journal]
  356. George W. Rhyne, Michael Steer, K. S. Kundent, Alberto L. Sangiovanni-Vincentelli
    Comments on 'Simulation of nonlinear circuits in the frequency domain' [with reply]. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1989, v:8, n:8, pp:927-929 [Journal]
  357. David C. Riley, Alberto L. Sangiovanni-Vincentelli
    Models for a New Profit-Based Methodology for Statistical Design of Integrated Circuits. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1986, v:5, n:1, pp:131-169 [Journal]
  358. Alexander Saldanha, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli
    Circuit structure relations to redundancy and delay. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1994, v:13, n:7, pp:875-883 [Journal]
  359. Alexander Saldanha, Tiziano Villa, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli
    Satisfaction of input and output encoding constraints. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1994, v:13, n:5, pp:589-602 [Journal]
  360. Richard L. Rudell, Alberto L. Sangiovanni-Vincentelli
    Multiple-Valued Minimization for PLA Optimization. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1987, v:6, n:5, pp:727-750 [Journal]
  361. Hyunchul Shin, Alberto L. Sangiovanni-Vincentelli
    A Detailed Router Based on Incremental Routing Modifications: Mighty. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1987, v:6, n:6, pp:942-955 [Journal]
  362. Hyunchul Shin, Alberto L. Sangiovanni-Vincentelli, Carlo H. Séquin
    'Zone-refining' techniques for IC layout compaction. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1990, v:9, n:2, pp:167-179 [Journal]
  363. Paul R. Stephan, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli
    Combinational test generation using satisfiability. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1996, v:15, n:9, pp:1167-1176 [Journal]
  364. Christopher Umans, Tiziano Villa, Alberto L. Sangiovanni-Vincentelli
    Complexity of two-level logic minimization. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 2006, v:25, n:7, pp:1230-1246 [Journal]
  365. Tiziano Villa, Timothy Kam, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli
    Explicit and implicit algorithms for binate covering problems. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1997, v:16, n:7, pp:677-691 [Journal]
  366. Tiziano Villa, Alberto L. Sangiovanni-Vincentelli
    NOVA: state assignment of finite state machines for optimal two-level logic implementation. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1990, v:9, n:9, pp:905-924 [Journal]
  367. Tiziano Villa, Alexander Saldanha, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli
    Symbolic two-level minimization. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1997, v:16, n:7, pp:692-708 [Journal]
  368. V. Visvanathan, Alberto L. Sangiovanni-Vincentelli
    A Computational Approach for the Diagnosability of Dynamical Circuits. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1984, v:3, n:3, pp:165-171 [Journal]
  369. Donald M. Webber, Eric Tomacruz, Roberto Guerrieri, Toru Toyabe, Alberto L. Sangiovanni-Vincentelli
    A massively parallel algorithm for three-dimensional device simulation. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1991, v:10, n:9, pp:1201-1209 [Journal]
  370. Ruey-Sing Wei, Alberto L. Sangiovanni-Vincentelli
    PLATYPUS: A PLA Test Pattern Generation Tool. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1986, v:5, n:4, pp:633-644 [Journal]
  371. Paul Caspi, Alberto L. Sangiovanni-Vincentelli, Luís Almeida, Albert Benveniste, Bruno Bouyssounouse, Giorgio C. Buttazzo, Ivica Crnkovic, Werner Damm, Jakob Engblom, Gerhard Fohler, Marisol García-Valls, Hermann Kopetz, Yassine Lakhnech, François Laroussinie, Luciano Lavagno, Giuseppe Lipari, Florence Maraninchi, Philipp Peti, Juan Antonio de la Puente, Norman Scaife, Joseph Sifakis, Robert de Simone, Martin Törngren, Paulo Veríssimo, Andy J. Wellings, Reinhard Wilhelm, Tim A. C. Willemse, Wang Yi
    Guidelines for a graduate curriculum on embedded software and systems. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Embedded Comput. Syst., 2005, v:4, n:3, pp:587-611 [Journal]
  372. Alberto L. Sangiovanni-Vincentelli, Alessandro Pinto
    An overview of embedded system design education at berkeley. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Embedded Comput. Syst., 2005, v:4, n:3, pp:472-499 [Journal]
  373. Claudio Passerone, Claudio Sansoè, Luciano Lavagno, Patrick C. McGeer, Jonathan Martin, Roberto Passerone, Alberto L. Sangiovanni-Vincentelli
    Modeling reactive systems in Java. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Design Autom. Electr. Syst., 1998, v:3, n:4, pp:515-523 [Journal]
  374. Alessandro Pinto, Alvise Bonivento, Alberto L. Sangiovanni-Vincentelli, Roberto Passerone, Marco Sgroi
    System level design paradigms: Platform-based design and communication synthesis. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Design Autom. Electr. Syst., 2006, v:11, n:3, pp:537-563 [Journal]
  375. Abhijit Davare, Qi Zhu, Marco Di Natale, Claudio Pinello, Sri Kanajan, Alberto L. Sangiovanni-Vincentelli
    Period Optimization for Hard Real-time Distributed Automotive Systems. [Citation Graph (0, 0)][DBLP]
    DAC, 2007, pp:278-283 [Conf]
  376. Nick Smith, Andrew Chien, Christopher Hegarty, Walden C. Rhines, Alberto L. Sangiovanni-Vincentelli, Frank Winters
    Electronics: The New Differential in the Automotive Industry. [Citation Graph (0, 0)][DBLP]
    DAC, 2007, pp:446- [Conf]
  377. Wei Zheng, Marco Di Natale, Claudio Pinello, Paolo Giusto, Alberto L. Sangiovanni-Vincentelli
    Synthesis of task and message activation models in real-time distributed automotive systems. [Citation Graph (0, 0)][DBLP]
    DATE, 2007, pp:93-98 [Conf]
  378. Qi Zhu, Abhijit Davare, Alberto L. Sangiovanni-Vincentelli
    A semantic-driven synthesis flow for platform-based design. [Citation Graph (0, 0)][DBLP]
    MEMOCODE, 2006, pp:199- [Conf]
  379. Roberto Passerone, Jerry R. Burch, Alberto L. Sangiovanni-Vincentelli
    Refinement preserving approximations for the design and verification of heterogeneous systems. [Citation Graph (0, 0)][DBLP]
    Formal Methods in System Design, 2007, v:31, n:1, pp:1-33 [Journal]
  380. Farinaz Koushanfar, Abhijit Davare, David T. Nguyen, Alberto L. Sangiovanni-Vincentelli, Miodrag Potkonjak
    Techniques for maintaining connectivity in wireless ad-hoc networks under energy constraints. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Embedded Comput. Syst., 2007, v:6, n:3, pp:- [Journal]
  381. Leonardo Mangeruca, Massimo Baleani, Alberto Ferrari, Alberto L. Sangiovanni-Vincentelli
    Semantics-Preserving Design of Embedded Control Software from Synchronous Models. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Software Eng., 2007, v:33, n:8, pp:497-509 [Journal]
  382. Patrick C. McGeer, Jagesh V. Sanghavi, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli
    ESPRESSO-SIGNATURE: a new exact minimizer for logic functions. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 1993, v:1, n:4, pp:432-440 [Journal]

  383. Approximating Behaviors in Embedded System Design. [Citation Graph (, )][DBLP]


  384. Automotive networks: are new busses and gateways the answer or just another challenge? [Citation Graph (, )][DBLP]


  385. Fresh air: the emerging landscape of design for networked embedded systems. [Citation Graph (, )][DBLP]


  386. Contract-based system-level composition of analog circuits. [Citation Graph (, )][DBLP]


  387. Scheduling the FlexRay bus using optimization techniques. [Citation Graph (, )][DBLP]


  388. Education panel: designing the always connected car of the future. [Citation Graph (, )][DBLP]


  389. Physical Architectures of Automotive Systems. [Citation Graph (, )][DBLP]


  390. Methods, Tools and Standards for the Analysis, Evaluation and Design of Modern Automotive Architectures. [Citation Graph (, )][DBLP]


  391. Source-Level Timing Annotation and Simulation for a Heterogeneous Multiprocessor. [Citation Graph (, )][DBLP]


  392. Software Components for Reliable Automotive Systems. [Citation Graph (, )][DBLP]


  393. Logical Reliability of Interacting Real-Time Tasks. [Citation Graph (, )][DBLP]


  394. Panel Session - The Future Car: Technology, Methods and Tools. [Citation Graph (, )][DBLP]


  395. UMTS MPSoC design evaluation using a system level design framework. [Citation Graph (, )][DBLP]


  396. Optimizations of an application-level protocol for enhanced dependability in FlexRay. [Citation Graph (, )][DBLP]


  397. All things are connected. [Citation Graph (, )][DBLP]


  398. Loosely time-triggered architectures based on communication-by-sampling. [Citation Graph (, )][DBLP]


  399. A communication synthesis infrastructure for heterogeneous networked control systems and its application to building automation and control. [Citation Graph (, )][DBLP]


  400. Contract-Based Design for Computation and Verification of a Closed-Loop Hybrid System. [Citation Graph (, )][DBLP]


  401. Peer-to-peer estimation over wireless sensor networks via Lipschitz optimization. [Citation Graph (, )][DBLP]


  402. Optimizing the Implementation of Communication in Synchronous Reactive Models. [Citation Graph (, )][DBLP]


  403. Optimizing End-to-End Latencies by Adaptation of the Activation Events in Distributed Automotive Systems. [Citation Graph (, )][DBLP]


  404. Optimizing Extensibility in Hard Real-Time Distributed Systems. [Citation Graph (, )][DBLP]


  405. Definition of Task Allocation and Priority Assignment in Hard Real-Time Distributed Systems. [Citation Graph (, )][DBLP]


  406. Cooperative Diversity with Disconnection Constraints and Sleep Discipline for Power Control in Wireless Sensor Networks. [Citation Graph (, )][DBLP]


  407. Duty-Cycle Optimization in Unslotted 802.15.4 Wireless Sensor Networks. [Citation Graph (, )][DBLP]


  408. Outage-Based Rate Maximization in CDMA Wireless Networks. [Citation Graph (, )][DBLP]


  409. Iterative Node Deployment in an Unknown Environment. [Citation Graph (, )][DBLP]


  410. Statistical analysis of Controller Area Network message response times. [Citation Graph (, )][DBLP]


  411. Breath: A Self-Adapting Protocol for Wireless Sensor Networks in Control and Automation. [Citation Graph (, )][DBLP]


  412. Analysis of Interference Effects in MB-OFDM UWB Systems. [Citation Graph (, )][DBLP]


  413. Hybrid system reduction. [Citation Graph (, )][DBLP]


  414. Composing hybrid systems. [Citation Graph (, )][DBLP]


  415. Embedded System Design for Automotive Applications. [Citation Graph (, )][DBLP]


  416. Distributed Estimation over Wireless Sensor Networks with Packet Losses [Citation Graph (, )][DBLP]


  417. Metamodeling: An Emerging Representation Paradigm for System-Level Design. [Citation Graph (, )][DBLP]


  418. Is a Unified Methodology for System-Level Design Possible? [Citation Graph (, )][DBLP]


  419. COSI: A Framework for the Design of Interconnection Networks. [Citation Graph (, )][DBLP]


  420. The State of ESL Design [Roundtable]. [Citation Graph (, )][DBLP]


  421. Metamodels in Europe: Languages, Tools, and Applications. [Citation Graph (, )][DBLP]


Search in 5.795secs, Finished in 5.808secs
NOTICE1
System may not be available sometimes or not working properly, since it is still in development with continuous upgrades
NOTICE2
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP
 
System created by asidirop@csd.auth.gr [http://users.auth.gr/~asidirop/] © 2002
for Data Engineering Laboratory, Department of Informatics, Aristotle University © 2002