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Andrew Kinane:
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- Andrew Kinane, Valentin Muresan, Noel E. O'Connor
Optimisation of Constant Matrix Multiplication Operation Hardware Using a Genetic Algorithm. [Citation Graph (0, 0)][DBLP] EvoWorkshops, 2006, pp:296-307 [Conf]
- Andrew Kinane, Alan Casey, Valentin Muresan, Noel E. O'Connor
FPGA-Based Conformance Testing and System Prototyping of an MPEG-4 SA-DCT Hardware Accelerator. [Citation Graph (0, 0)][DBLP] FPT, 2005, pp:317-318 [Conf]
- Daniel Larkin, Andrew Kinane, Noel E. O'Connor
Towards Hardware Acceleration of Neuroevolution for Multimedia Processing Applications on Mobile Devices. [Citation Graph (0, 0)][DBLP] ICONIP (3), 2006, pp:1178-1188 [Conf]
- Daniel Larkin, Andrew Kinane, Valentin Muresan, Noel E. O'Connor
An Efficient Hardware Architecture for a Neural Network Activation Function Generator. [Citation Graph (0, 0)][DBLP] ISNN (2), 2006, pp:1319-1327 [Conf]
- Andrew Kinane, Valentin Muresan, Noel E. O'Connor, Noel Murphy, Seán Marlow
Energy-Efficient Hardware Architecture for Variable N-point 1D DCT. [Citation Graph (0, 0)][DBLP] PATMOS, 2004, pp:780-788 [Conf]
- Andrew Kinane, Valentin Muresan, Noel E. O'Connor
Towards an optimised VLSI design algorithm for the constant matrix multiplication problem. [Citation Graph (0, 0)][DBLP] ISCAS, 2006, pp:- [Conf]
- Andrew Kinane, Noel E. O'Connor
Energy-efficient Hardware Accelerators for the SA-DCT and Its Inverse. [Citation Graph (0, 0)][DBLP] VLSI Signal Processing, 2007, v:47, n:2, pp:127-152 [Journal]
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