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Alper Sen: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Alper Sen, Vijay K. Garg
    On Checking Whether a Predicate Definitely Holds. [Citation Graph (0, 0)][DBLP]
    FATES, 2003, pp:15-29 [Conf]
  2. Neeraj Mittal, Alper Sen, Vijay K. Garg, Ranganath Atreya
    Finding Satisfying Global States: All for One and One for All. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2004, pp:- [Conf]
  3. Alper Sen, Vijay K. Garg
    Detecting Temporal Logic Predicates on the Happened-Before Model. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2002, pp:- [Conf]
  4. Alper Sen, Vijay K. Garg, Jacob A. Abraham, Jayanta Bhadra
    Formal Verification of a System-on-Chip Using Computation Slicing. [Citation Graph (0, 0)][DBLP]
    ITC, 2004, pp:810-819 [Conf]
  5. Alper Sen, Vijay K. Garg
    Detecting Temporal Logic Predicates in Distributed Programs Using Computation Slicing. [Citation Graph (0, 0)][DBLP]
    OPODIS, 2003, pp:171-183 [Conf]
  6. Alper Sen, Vijay K. Garg
    Partial Order Trace Analyzer (POTA) for Distributed Programs. [Citation Graph (0, 0)][DBLP]
    Electr. Notes Theor. Comput. Sci., 2003, v:89, n:2, pp:- [Journal]
  7. Alper Sen
    Error Diagnosis in Equivalence Checking of High Performance Microprocessors. [Citation Graph (0, 0)][DBLP]
    Electr. Notes Theor. Comput. Sci., 2007, v:174, n:4, pp:9-18 [Journal]
  8. Alper Sen, Ömer S. Benli
    Lot streaming in open shops. [Citation Graph (0, 0)][DBLP]
    Oper. Res. Lett., 1998, v:23, n:3-5, pp:135-142 [Journal]
  9. Alper Sen, Vijay K. Garg
    Formal Verification of Simulation Traces Using Computation Slicing. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2007, v:56, n:4, pp:511-527 [Journal]
  10. Neeraj Mittal, Alper Sen, Vijay K. Garg
    Solving Computation Slicing Using Predicate Detection. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Parallel Distrib. Syst., 2007, v:18, n:12, pp:1700-1713 [Journal]

  11. Introducing Hardware-in-Loop Concept to the Hardware/Software Co-design of Real-time Embedded Systems. [Citation Graph (, )][DBLP]


  12. Predictive runtime verification of multi-processor SoCs in SystemC. [Citation Graph (, )][DBLP]


  13. Parallel Cycle Based Logic Simulation Using Graphics Processing Units. [Citation Graph (, )][DBLP]


  14. Runtime Verification of k-Mutual Exclusion for SoCs. [Citation Graph (, )][DBLP]


  15. Application of Automated Model Generation Techniques to Analog/Mixed-Signal Circuits. [Citation Graph (, )][DBLP]


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