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Publications of Author

1. Wenyin Fu, Katherine Compton
   An Execution Environment for Reconfigurable Computing. [Citation Graph (0, 0)][DBLP]
   FCCM, 2005, pp:149-158 [Conf]
   
2. Katherine Compton, James Cooley, Stephen Knol, Scott Hauck
   Configuration Relocation and Defragmentation for Reconfigurable Computing. [Citation Graph (0, 0)][DBLP]
   FCCM, 2000, pp:279-280 [Conf]
   
3. Zhiyuan Li, Katherine Compton, Scott Hauck
   Configuration Caching Management Techniques for Reconfigurable Computing. [Citation Graph (0, 0)][DBLP]
   FCCM, 2000, pp:22-38 [Conf]
   
4. Wenyin Fu, Katherine Compton
   An execution environment for reconfigurable computing (abstract only). [Citation Graph (0, 0)][DBLP]
   FPGA, 2005, pp:267- [Conf]
   
5. Katherine Compton, Scott Hauck
   Track placement: orchestrating routing structures to maximize routability. [Citation Graph (0, 0)][DBLP]
   FPGA, 2003, pp:241- [Conf]
   
6. Katherine Compton, Scott Hauck
   Flexibility measurement of domain-specific reconfigurable hardware. [Citation Graph (0, 0)][DBLP]
   FPGA, 2004, pp:155-161 [Conf]
   
7. Akshay Sharma, Katherine Compton, Carl Ebeling, Scott Hauck
   Exploration of pipelined FPGA interconnect structures. [Citation Graph (0, 0)][DBLP]
   FPGA, 2004, pp:13-22 [Conf]
   
8. Katherine Compton, Scott Hauck
   Track Placement: Orchestrating Routing Structures to Maximize Routability. [Citation Graph (0, 0)][DBLP]
   FPL, 2003, pp:121-130 [Conf]
   
9. Katherine Compton, Akshay Sharma, Shawn Phillips, Scott Hauck
   Flexible Routing Architecture Generation for Domain-Specific Reconfigurable Subsystems. [Citation Graph (0, 0)][DBLP]
   FPL, 2002, pp:59-68 [Conf]
   
10. Kyle Rupnow, Arun Rodrigues, Keith D. Underwood, Katherine Compton
    Scientific applications vs. SPEC-FP: a comparison of program behavior. [Citation Graph (0, 0)][DBLP]
    ICS, 2006, pp:66-74 [Conf]
    
11. Katherine Compton, Scott Hauck
    Reconfigurable computing: a survey of systems and software. [Citation Graph (0, 0)][DBLP]
    ACM Comput. Surv., 2002, v:34, n:2, pp:171-210 [Journal]
    
12. Katherine Compton, Scott Hauck
    Automatic Design of Area-Efficient Configurable ASIC Cores. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2007, v:56, n:5, pp:662-672 [Journal]
    
13. Wenyin Fu, Katherine Compton
    A Simulation Platform for Reconfigurable Computing Research. [Citation Graph (0, 0)][DBLP]
    FPL, 2006, pp:1-7 [Conf]
    
14. Katherine Compton, Zhiyuan Li, James Cooley, Stephen Knol, Scott Hauck
    Configuration relocation and defragmentation for run-time reconfigurable computing. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 2002, v:10, n:3, pp:209-220 [Journal]
    
15. 
    A Combined Decimal and Binary Floating-Point Multiplier. [Citation Graph (, )][DBLP]
    
    
16. 
    Scheduling Intervals for Reconfigurable Computing. [Citation Graph (, )][DBLP]
    
    
17. 
    A Reconfigurable Hardware Interface for a Modern Computing System. [Citation Graph (, )][DBLP]
    
    
18. 
    Scientific Application Acceleration with Reconfigurable Functional Units. [Citation Graph (, )][DBLP]
    
    
19. 
    Block, Drop or Roll(back): Alternative Preemption Methods for RH Multi-Tasking. [Citation Graph (, )][DBLP]
    
    
20. 
    Shared Memory Cache Organizations for Reconfigurable Computing Systems. [Citation Graph (, )][DBLP]
    
    
21. 
    FPGA Design Analysis of the Clustering Algorithm for the CERN Large Hadron Collider. [Citation Graph (, )][DBLP]
    
    
22. 
    Accurately evaluating application performance in simulated hybrid multi-tasking systems. [Citation Graph (, )][DBLP]
    
    
23. 
    Automatic generation of high-performance multipliers for FPGAs with asymmetric multiplier blocks. [Citation Graph (, )][DBLP]
    
    
24. 
    Active kernel monitoring to combat scheduler gaming in reconfigurable computing systems. [Citation Graph (, )][DBLP]
    
    
25. 
    Performance metrics for hybrid multi-tasking systems. [Citation Graph (, )][DBLP]