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Nabeel Shirazi: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Altaf Abdul Gaffar, Wayne Luk, Peter Y. K. Cheung, Nabeel Shirazi
    Customising Floating-Point Designs. [Citation Graph (0, 0)][DBLP]
    FCCM, 2002, pp:315-317 [Conf]
  2. Wayne Luk, T. K. Lee, J. Rice, Nabeel Shirazi, Peter Y. K. Cheung
    Reconfigurable Computing for Augmented Reality. [Citation Graph (0, 0)][DBLP]
    FCCM, 1999, pp:136-145 [Conf]
  3. Wayne Luk, Nabeel Shirazi, Peter Y. K. Cheung
    Compilation tools for run-time reconfigurable designs. [Citation Graph (0, 0)][DBLP]
    FCCM, 1997, pp:56-65 [Conf]
  4. Nabeel Shirazi, Wayne Luk, Peter Y. K. Cheung
    Automating Production of Run-Time Reconfigurable Designs. [Citation Graph (0, 0)][DBLP]
    FCCM, 1998, pp:147-0 [Conf]
  5. Nabeel Shirazi, Al Walters, Peter M. Athanas
    Quantitative analysis of floating point arithmetic on FPGA based custom computing machines. [Citation Graph (0, 0)][DBLP]
    FCCM, 1995, pp:155-163 [Conf]
  6. Vinay Singh, Ann Root, E. Hemphill, Nabeel Shirazi, James Hwang
    Accelerating Bit Error Rate Testing Using a System Level Design Tool. [Citation Graph (0, 0)][DBLP]
    FCCM, 2003, pp:62-68 [Conf]
  7. Jonathan Ballagh, James Hwang, H. Ma, Brent Milne, Nabeel Shirazi, Vinay Singh, Jeffrey D. Stroomer
    Specifying Control Logic for DSP Applications in FPGA. [Citation Graph (0, 0)][DBLP]
    FPL, 2003, pp:1099-1102 [Conf]
  8. Altaf Abdul Gaffar, Wayne Luk, Peter Y. K. Cheung, Nabeel Shirazi, James Hwang
    Automating Customisation of Floating-Point Designs. [Citation Graph (0, 0)][DBLP]
    FPL, 2002, pp:523-533 [Conf]
  9. James Hwang, Brent Milne, Nabeel Shirazi, Jeffrey D. Stroomer
    System Level Tools for DSP in FPGAs. [Citation Graph (0, 0)][DBLP]
    FPL, 2001, pp:534-543 [Conf]
  10. Wayne Luk, P. Andreou, Arran Derbyshire, F. Dupont-De-Dinechin, J. Rice, Nabeel Shirazi, D. Siganos
    A Reconfigurable Engine for Real-Time Video Processing. [Citation Graph (0, 0)][DBLP]
    FPL, 1998, pp:169-178 [Conf]
  11. Wayne Luk, Shaori Guo, Nabeel Shirazi, N. Zhuang
    A Framework for Developing Parameterised FPGA Libraries. [Citation Graph (0, 0)][DBLP]
    FPL, 1996, pp:24-33 [Conf]
  12. Wayne Luk, Nabeel Shirazi, Shaori Guo, Peter Y. K. Cheung
    Pipeline morphing and virtual pipelines. [Citation Graph (0, 0)][DBLP]
    FPL, 1997, pp:111-120 [Conf]
  13. Nabeel Shirazi, Peter M. Athanas, A. Lynn Abbott
    Implementation of a 2-D Fast Fourier Transform on an FPGA-Based Custom Computing Machine. [Citation Graph (0, 0)][DBLP]
    FPL, 1995, pp:282-292 [Conf]
  14. Nabeel Shirazi, Wayne Luk, Dan Benyamin, Peter Y. K. Cheung
    Quantitative Analysis of Run-Time Reconfigurable Database Search. [Citation Graph (0, 0)][DBLP]
    FPL, 1999, pp:253-263 [Conf]
  15. Nabeel Shirazi, Wayne Luk, Peter Y. K. Cheung
    Run-Time Management of Dynamically Recongigurable Designs. [Citation Graph (0, 0)][DBLP]
    FPL, 1998, pp:59-68 [Conf]
  16. Jeffrey M. Arnold, Duncan A. Buell, Dzung T. Hoang, Daniel V. Pryor, Nabeel Shirazi, Mark R. Thistle
    The Splash 2 Processor and Applications. [Citation Graph (0, 0)][DBLP]
    ICCD, 1993, pp:482-485 [Conf]

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