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Walter Huang: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Daniel J. Allred, Walter Huang, Venkatesh Krishnan, Heejong Yoo, David V. Anderson
    An FPGA Implementation for a High Throughput Adaptive Filter Using Distributed Arithmetic. [Citation Graph (0, 0)][DBLP]
    FCCM, 2004, pp:324-325 [Conf]
  2. Erhan Ozalevli, Walter Huang, Paul E. Hasler, David V. Anderson
    VLSI Implementation of a Reconfigurable Mixed-Signal Finite Impulse Response Filter. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2007, pp:2168-2171 [Conf]

  3. Adaptive filters using modified sliding-block distributed arithmetic with offset binary coding. [Citation Graph (, )][DBLP]


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